HT56R66 Holtek Semiconductor Inc., HT56R66 Datasheet - Page 34

• Manufacturer Part Number: HT56R66
• Description: Tinypower Tm A/d Type With Lcd 8-bit Otp Mcu
• Manufacturer: Holtek Semiconductor Inc.

LED Driver Output
The LED driver uses the COM and SEG lines to drive
the LED display. The number of COM and SEG outputs
supplied by the LED driver, as well as its biasing and
duty selections, are dependent upon how the LED con-
trol bits are programmed.
When the LEDSEL bit in the LEDCTRL register is set
high, the COM and SEG lines will be setup as CMOS
output drivers to drive the LED display. The COM and
SEG lines can be set to be either active high or active
low using bits in the LEDCTRL register. This provides 4
different timing modes. These are COM low active, SEG
low active; COM low active, SEG high active; COM high
active, SEG low active; COM high active, SEG high ac-
tive. The COM and SEGlines will have a reverse polarity
when in the non-active state when the display is off. For
the LED driver there are a total of 5 different duty cycle
selections which are Static, 1/4, 1/8, 1/12 and 1/16. The
The frame rate of each duty cycle will be between 55Hz
and 75Hz.
LCD Voltage Source and Biasing
The time and amplitude varying signals generated by the
LCD Driver function require the generation of several
voltage levels for their operation. The number of voltage
levels used by the signal depends upon the value of the
BIAS bit in the LCDCTRL register. The device can have
either R type or C type biasing selected via a configura-
tion option. Selecting the C type biasing will enable an in-
ternal charge pump whose multiplier ratio can be
selected using an additional configuration option.
For R type biasing an external LCD voltage source must
be supplied on pin VLCD1 to generate the internal bias-
ing voltages. This could be the microcontroller power
supply or some other voltage source. For the R type 1/2
bias selection, three voltage levels VSS, VA and VB are
utilised. The voltage VA is equal to the externally sup-
plied voltage source applied to pin VLCD1. VB is gener-
ated internally by the microcontroller and will have a
value equal to VLCD1/2. For the R type 1/3 bias selec-
tion, four voltage levels VSS, VA, VB and VC are uti-
lised. The voltage VA is equal to VLCD1, VB is equal to
VLCD1 2/3 while VC is equal to VLCD1 1/3. In addition
to selecting 1/2 or 1/3 bias, several values of bias resis-
tor can be chosen using bits in the LCDCTRL register.
Different values of internal bias resistors can be se-
lected using the RSEL0 and RESEL1 bits in the
LCDCTRL register. This along with the voltage on pin
VLCD1 will determine the bias current. The connection
to the VMAX pin depends upon the voltage that is ap-
plied to VLCD1. If the VDD voltage is greater than the
voltage applied to the VLCD1 pin then the VMAX pin
should be connected to VDD, otherwise the VMAX pin
should be connected to pin VLCD1. Note that no exter-
nal capacitors or resistors are required to be connected
if R type biasing is used.
Rev. 1.10
34
For C type biasing an external LCD voltage source must
also be supplied on pin VLCD1 to generate the internal
biasing voltages. The C type biasing scheme uses an in-
ternal charge pump circuit, which in the case of the 1/3
bias selection can generate voltages higher than what is
supplied on VLCD1. This feature is useful in applica-
tions where the microcontroller supply voltage is less
than the supply voltage required by the LCD. An addi-
tional charge pump capacitor must also be connected
between pins C1 and C2 to generate the necessary volt-
age levels.
For the C type 1/2 bias selection, three voltage levels
VSS, VA and VB are utilised. The voltage VA is generated
internally and has a value of VLCD1. VB will have a value
equal to VA 0.5. For the C type 1/2 bias configuration VC
is not used.
For the C type 1/3 bias selection, four voltage levels
VSS, VA, VB and VC are utilised. The voltage VA is gen-
erated internally and has a value of VLCD1 1.5. VB will
have a value equal to VA 2/3 and VC will have a value
equal to VA
pends upon the bias and the voltage that is applied to
VLCD1, the details are shown in the table. Note that C
type biasing is not available on the 52-pin QFP package
device types. On these package types, pins C1, C2 and
VLCD2 are not provided. It is recommended that a
0.1 F capacitor is connected between the V1 pin and
ground on the 52-pin QFP package types.
It is extremely important to ensure that these charge
pump generated internal voltages do not exceed the
maximum VDD voltage of 5.5V. Note that the C-type bias
type is not available on the 52-pin QFP package type.
Bias
Bias
1/3
1/2
VDD > VLCD1
Condition
Otherwise
R Type Bias Current VMAX Connection
Biasing Type
VDD VLCD1 1.5 Connect VMAX to VDD
Otherwise
VDD VLCD1
Otherwise
C Type Biasing VMAX Connection
1/3. The connection to the VMAX pin de-
HT56R66/HT56R666
Connect VMAX to VLCD1
Connect VMAX to VDD
Connect VMAX to V1
Connect VMAX to VDD
Connect VMAX to VLCD1
VMAX connection
VMAX Connection
September 8, 2009