ADL5310 Analog Devices, Inc., ADL5310 Datasheet

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ADL5310

Manufacturer Part Number
ADL5310
Description
120 Db Range 3 Na To 3 Ma Dual Logarithmic Converter
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
2 independent channels optimized for photodiode
6-decade input dynamic range
Temperature-stable logarithmic outputs
Nominal slope 10 mV/dB (200 mV/dec), externally scalable
Intercepts may be independently set by external resistors
User-configurable output buffer amplifiers
Single- or dual-supply operation
Space-efficient, 24-lead 4 mm × 4 mm LFCSP
Low power: < 10 mA quiescent current
APPLICATIONS
Gain and absorbance measurements
Multichannel power monitoring
General-purpose baseband log compression
PRODUCT DESCRIPTION
The ADL5310
input current over a wide dynamic range to a linear-in-dB
output voltage. It is optimized to determine the optical power
in wide-ranging optical communication system applications,
including control circuitry for lasers, optical switches, atten-
uators, and amplifiers, as well as system monitoring. The device
is equivalent to a dual AD8305 with enhanced dynamic range
(120 dB). While the ADL5310 contains two independent signal
channels with individually configurable transfer function
constants (slope and intercept), internal bias circuitry is shared
between channels for improved power consumption and
channel matching. Dual converters in a single, compact LFCSP
package yield space-efficient solutions for measuring gain or
attenuation across optical elements. Only a single supply is
required; optional dual-supply operation offers added flexibility.
The ADL5310 employs an optimized translinear structure that
use the accurate logarithmic relationship between a bipolar
transistor’s base emitter voltage and collector current, with
appropriate scaling by precision currents to compensate for the
inherent temperature dependence. Input and reference current
pins sink current ranging from 3 nA to 3 mA (limited to ±60 dB
between input and reference) into a fixed voltage defined by the
VSUM potential. The VSUM potential is internally set to
500 mV but may be externally grounded for dual-supply opera-
tion, and for additional applications requiring voltage inputs.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
interfacing
Law conformance 0.3 dB from 3 nA to 3 mA
1
low cost, dual logarithmic amplifier converts
The logarithmic slope is set to 10 mV/dB (200 mV/decade)
nominal and can be modified using external resistors and the
independent buffer amplifiers. The logarithmic intercepts for
each channel are defined by the individual reference currents,
which are set to 3 μA nominal for maximum input range by
connecting 665 kΩ resistors between the 2.5 V VREF pins and
the IRF1 and IRF2 inputs. Tying VRDZ to VREF effectively sets
the x-intercept four decades below the reference current—
typically 300 pA for a 3 µA reference.
The use of individually optimized reference currents may
be valuable when using the ADL5310 for gain or absorbance
measurements where each channel input has a different current-
range requirement. The reference current inputs
are also fully functional dynamic inputs, allowing log ratio
operation with the reference input current as the denominator.
The ADL5310 is specified for operation from –40°C to +85°C.
1
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
V
V
US Patents: 4,604,532, 5,519,308. Other patents pending.
BIAS
BIAS
I
I
PD1
PD2
120 dB Range (3 nA to 3 mA)
VSUM
VSUM
Dual Logarithmic Converter
INP1
INP2
IRF1
IRF2
FUNCTIONAL BLOCK DIAGRAM
COMM
20kΩ
665kΩ
665kΩ
0.5V
© 2004 Analog Devices, Inc. All rights reserved.
VNEG
VNEG
VREF
VREF
80kΩ
2.5V
Figure 1.
VRDZ
COMPENSATION
COMPENSATION
TEMPERATURE
TEMPERATURE
GENERATOR
REFERENCE
COMM
COMM
6.69kΩ
14.2kΩ
14.2kΩ
6.69kΩ
I
I
LOG
LOG
ADL5310
www.analog.com
451Ω
451Ω
OUT1
SCL1
BIN1
LOG1
OUT2
SCL2
BIN2
LOG2
V
V
OUT1
OUT2

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ADL5310 Summary of contents

Page 1

... The use of individually optimized reference currents may be valuable when using the ADL5310 for gain or absorbance measurements where each channel input has a different current- range requirement. The reference current inputs are also fully functional dynamic inputs, allowing log ratio operation with the reference input current as the denominator ...

Page 2

... ADL5310 TABLE OF CONTENTS Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 4 Pin Configuration and Function Descriptions............................. 5 Typical Performance Characteristics ............................................. 6 General Structure............................................................................ 11 Theory.......................................................................................... 11 Managing Intercept and Slope .................................................. 12 Response Time and Noise Considerations.............................. 12 REVISION HISTORY 9/04—Data Sheet Changed from Rev Rev. A Changes to Ordering Guide .......................................................... 20 11/03—Revision 0: Initial Version Applications ...

Page 3

... Gain = 1 0 4.8 V output swing Pins 8 and 9: VPOS; Pins 10, 11, and 20: VNEG (V – ≤ Input currents < 10 µA (V – ≤ REF Rev Page ADL5310 Min Typ Max Unit 0.46 0.5 0.54 V 0.030 mV/° ...

Page 4

... ADL5310 ABSOLUTE MAXIMUM RATINGS Table 2. Parameter Supply Voltage V − Input Current Internal Power Dissipation θ JA Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 60 sec) 1 With paddle soldered down. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...

Page 5

... Figure 2. 24-Lead LFCSP Pin Configuration – ≤ Both pins must be connected externally These pins are usually grounded. For more details, see the General Structure and N Rev Page ADL5310 SCL1 BIN1 LOG1 LOG2 BIN2 SCL2 . Usually connected to photodiode anode PD1 ...

Page 6

... ADL5310 TYPICAL PERFORMANCE CHARACTERISTICS 665 kΩ 25°C, unless otherwise noted. REF 1 –40°C, 0°C, +25°C, +70°C, +85° 1.4 1.2 1.0 0.8 0.6 0.4 0 10n 100n 1µ 10µ I (A) INP Figure 3. V vs. I for Multiple Temperatures LOG INP 1 –40°C, 0°C, +25°C, +70°C, +85°C ...

Page 7

... MEAN – 3σ 1n 10n 100n 1µ 10µ 100µ –40°C, 85°C A MEAN + 3σ AT –40°C MEAN + 3σ AT +85°C MEAN – 3σ AT –40°C 1n 10n 100n 1µ 10µ 100µ I (A) PD ADL5310 3µA 3mA 1m 10m , INP = 25° 10m 1m 10m ...

Page 8

... ADL5310 15 30nA 10 300nA 5 3nA 0 –5 –10 –15 –20 –25 –30 –35 –40 –45 –50 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 15. Small Signal AC Response, I (5% Sine Modulation, Decade Steps from mA) 15 30nA 10 300nA 5 0 –5 3nA –10 –15 –20 3µA –25 – ...

Page 9

... Figure 25. Slope Mismatch Drift vs. Temperature – 3σ to Either Side of Mean) Normalized to 25° MEAN + 3σ MEAN – 3σ TEMPERATURE (°C) Figure 26. Intercept Mismatch Drift vs. Temperature (I – 3σ to Either Side of Mean) Normalized to 25° ADL5310 ...

Page 10

... ADL5310 700 600 500 400 300 200 100 0 190 195 200 SLOPE (mV/dec) Figure 27. Distribution of Logarithmic Slope 600 500 400 300 200 100 0 100 200 300 INTERCEPT (pA) Figure 28. Distribution of Logarithmic Intercept 700 600 500 400 300 200 100 0 2.46 2.48 2.50 VREF VOLTAGE (V) Figure 29. Distribution of V ...

Page 11

... Pin VREF. Both VREF pins are internally shorted, as are both VSUM pins. The resistance at the VSUM pin is nominally 16 kΩ; this voltage is not intended as a general bias source. The ADL5310 also supports the use of an optional negative supply voltage Pin VNEG. When V N negative, VSUM may be connected to ground ...

Page 12

... Further details on these applications can be found in the AD8304 data sheet. RESPONSE TIME AND NOISE CONSIDERATIONS The response time and output noise of the ADL5310 are funda- mentally a function of the signal current, I the bandwidth is proportional to I output low frequency voltage-noise spectral-density is a ...

Page 13

... I PD2 1kΩ 1nF 1nF The ADL5310 is easy to use in optical supervisory systems and in similar situations where a wide-ranging current converted to its logarithmic equivalent—that is, represented in decibel terms. Basic connections for measuring a single current at each input are shown in Figure 34, which also includes various nonessential components, as explained next. ...

Page 14

... AD8305 data sheet. CALIBRATION Each channel of the ADL5310 has a nominal slope and intercept at LOG1 (LOG2) of 200 mV/decade and 300 pA, respectively, when configured as shown in Figure 34. These values are untrimmed and the slope alone may vary by as much as 7.5% over temperature ...

Page 15

... Figure 37. The current mirror is used to feed an opposite polarity replica of the cathode photocurrent of PD2 into Channel 2 of the ADL5310. This allows one channel to be used as an absolute power meter for the optical signal incident on PD2, while the opposite channel is used to directly compute the log ratio of the two input signals. 0.1µ ...

Page 16

... Figure 39. Log Conformance for Wilson Mirror ADL5310 Combination, Normalized Channel 1 Input Current, I CHARACTERIZATION METHODS During the characterization of the ADL5310, the device was treated as a precision current-input logarithmic converter, because it is impractical to generate accurate photocurrents by illuminating a photodiode. The test currents were generated by ...

Page 17

... EVALUATION BOARD An evaluation board is available for the ADL5310 (Figure 40 shows the schematic). It can be configured for a wide variety of experiments. The gain of each buffer amp is factory-set to unity, providing a slope of 200 mV/dec, and the intercept is set to 300 pA. Table 4 describes the various configuration options. Table 4. Evaluation Board Configuration Options ...

Page 18

... VRDZ VNEG C3 0.01µF R3 OPEN R4 R2 0Ω 0Ω VBIAS C2 100pF R28 R29 665kΩ 665kΩ 1 VSUM 2 INP1 3 IRF1 ADL5310 4 IRF2 5 INP2 6 VSUM VREF OPEN C5 100pF C9 100pF R11 R10 0Ω 0Ω C6 0.01µF C8 0.01µF VBIAS AGND VPOS 1 ...

Page 19

... Figure 41. Component-Side Layout Figure 42. Component-Side Silkscreen Rev Page ADL5310 ...

Page 20

... Model Temperature Range ADL5310ACP-R2 –40°C to +85°C ADL5310ACP-REEL7 –40°C to +85°C ADL5310-EVAL 1 Branding is as follows: Line 1 — JQA Line 2 — Lot Code Line 3 — (Date Code) Date Code is in YYWW format © 2004 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...

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