MC56F8345 Freescale Semiconductor, Inc, MC56F8345 Datasheet - Page 29

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MC56F8345

Manufacturer Part Number
MC56F8345
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Freescale Semiconductor
Preliminary
PHASEA1
PHASEB1
(GPIOC0)
(GPIOC1)
(SCLK1)
(MOSI1)
Signal
Name
(TB0)
(TB1)
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Pin No.
10
9
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Input/
Input/
Type
Input
Input
56F8345 Technical Data, Rev. 17
enabled
enabled
During
pull-up
pull-up
Reset
Input,
Input,
State
Phase A1 — Quadrature Decoder 1, PHASEA input for decoder
1.
TB0 — Timer B, Channel 0
SPI 1 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves
as the data clock input. To activate the SPI function, set the
PHSA_ALT bit in the SIM_GPS register. For details, see
6.5.8.
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
In the 56F8345, the default state after reset is PHASEA1.
In the 56F8145, the default state is not one of the functions
offered and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOC_PUR register.
Phase B1 — Quadrature Decoder 1, PHASEB input for decoder
1.
TB1 — Timer B, Channel 1
SPI 1 Master Out/Slave In — This serial data pin is an output
from a master device and an input to a slave device. The master
device places data on the MOSI line a half-cycle before the clock
edge the slave device uses to latch the data. To activate the SPI
function, set the PHSB_ALT bit in the SIM_GPS register. For
details, see
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
In the 56F8345, the default state after reset is PHASEB1.
In the 56F8145, the default state is not one of the functions
offered and must be reconfigured.
To deactivate the internal pull-up resistor, clear bit 1 in the
GPIOC_PUR register.
Part
6.5.8.
Signal Description
Signal Pins
Part
29

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