LM4550B National Semiconductor Corporation, LM4550B Datasheet - Page 22
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LM4550B
Manufacturer Part Number
LM4550B
Description
Ac 97 Rev 2.1 Multi-channel Audio Codec With Stereo Headphone Amplifier, Sample Rate Conversion And National 3d Sound
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM4550B.pdf
(31 pages)
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AC Link Serial Interface Protocol
SDATA_IN: Slot 2 – Status Data
This slot returns 16-bit status data read from a codec control/
status register. The codec sends the data in the frame fol-
lowing a read-request by the controller (bit 15, slot 1 of the
Output Frame). If no read-request was made in the previous
frame the codec will stuff this slot with zeros.
(Continued)
18:12
Bits
4:2
1,0
19
10
11
9
8
7
6
5
Status Register
Slot 3 Request
Slot 4 Request
Slot 5 Request
Slot 6 Request
Slot 7 Request
Slot 8 Request
Slot 9 Request
(PCM Center)
Description
Unused Slot
Request bits
(PCM Right
(PCM Right
(PCM LFE)
(PCM Left
(PCM Left
Surround)
Surround)
Reserved
Reserved
Audio)
Audio)
Index
bit
bit
bit
bit
bit
bit
bit
SLOT 1, INPUT FRAME
Stuffed with "0" by LM4550B
Echo of the requested Status
Register address.
Unused - set to "0" by
LM4550B
Stuffed with "0"s by LM4550B
Stuffed with "0"s by LM4550B
0 = Controller should send
1 = Controller should not
0 = Controller should send
1 = Controller should not
0 = Controller should send
1 = Controller should not
0 = Controller should send
1 = Controller should not
0 = Controller should send
1 = Controller should not
0 = Controller should send
1 = Controller should not
valid data in Slot 3 of the
next Output Frame.
send Slot 3 data.
valid data in Slot 4 of the
next Output Frame.
send Slot 4 data.
valid data in Slot 6 of the
next Output Frame.
send Slot 6 data.
valid Slot 7 data in the
next Output Frame.
send Slot 7 data.
valid data in Slot 8 of
next Output Frame.
send Slot 8 data.
valid data in Slot 9 of
next Output Frame.
send Slot 9 data.
Comment
22
SDATA_IN: Slot 3 – PCM Record Left Channel
This slot contains sampled data from the left channel of the
stereo ADC. The signal to be digitized is selected using the
Record Select register (1Ah) and subsequently routed
through the Record Select Mux and the Record Gain ampli-
fier to the ADC.
This is a 20-bit slot and the digitized 18-bit PCM data is
transmitted in an MSB justified format. The remaining 2
LSBs are stuffed with zeros.
SDATA_IN: Slot 4 – PCM Record Right Channel
This slot contains sampled data from the right channel of the
stereo ADC. The signal to be digitized is selected using the
Record Select register (1Ah) and subsequently routed
through the Record Select Mux and the Record Gain ampli-
fier to the ADC.
This is a 20-bit slot and the digitized 18-bit PCM data is
transmitted in an MSB justified format. The remaining 2
LSBs are stuffed with zeros.
SDATA_IN: Slots 5 to 12 – Reserved
Slots 5 – 12 of the AC Link Input Frame are not used for data
by the LM4550B and are always stuffed with zeros.
Bits
19:4
Bits
19:2
Bits
19:2
3:0
1:0
1:0
Right Channel
PCM Record
Left Channel
PCM Record
Description
Description
Description
Status Data
Reserved
Reserved
Reserved
data
data
SLOT 2, INPUT FRAME
SLOT 3, INPUT FRAME
SLOT 4, INPUT FRAME
Data read from a codec
control/status register.
Stuffed with “0”s if no
read-request in previous frame.
Stuffed with "0"s by LM4550B
18-bit PCM audio sample from
left ADC
Stuffed with "0"s by LM4550B
18-bit PCM audio sample from
right ADC
Stuffed with "0"s by LM4550B
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