ST78C34 Exar Corporation, ST78C34 Datasheet - Page 8

• Manufacturer Part Number: ST78C34
• Description: General Purpose Parallel Printer Port With 83 Byte Fifo
• Manufacturer: Exar Corporation

COM BIT-2:
INIT input pin.
0= INIT pin is in low state
1= INIT pin is in high state
COM BIT-3:
-SLCTIN input pin.
0= -SLCTIN pin is in high state
1= -SLCTIN pin is in low state
COM BIT-4:
Interrupt mask.
0= Interrupt (INT output) is disabled
1= Interrupt (INT output) is enabled
COM BIT 7-5:
Not used. Are set to “1” permanently.
CONTROL REGISTER.
Writing to this register will set the state of the -
STROBE, -AUTOFDXT, INIT, SLCTIN pins, and in-
terrupt mask register.
CON BIT-0:
-STROBE output control bit.
0= -STROBE output is set to high state
1= -STROBE output is set to low state
CON BIT-1:
-AUTOFDXT output control bit.
0= -AUTOFDXT output is set to high state
1= -AUTOFDXT output is set to low state
CON BIT-2:
INIT output control bit.
0= INIT output is set to low state
1= INIT output is set to high state
CON BIT-3:
-SLCTIN output control bit.
0= -SLCTIN output is set to high state
1= -SLCTIN output is set to low state
CON BIT-4:
Interrupt output control bit.
0= INT output is disabled (three state mode)
1= INT output is enabled
ST78C34
Rev. 3.00
6-10
CON BIT-5:
I/O select. Direction of the PD7-PD0 can be selected
by setting or clearing this bit.
0= PD7-PD0 are set for output mode
1= PD7-PD0 are set for input mode
CON BIT 7-6:
Not used.
ALTERNATE FUNCTION REGISTER (AFR)
This register En/Disables FIFO operation and pro-
vides additional capabilities to control -STROBE. INT
and change interrupt functions.
AFR BIT 0-2:
Timing select.
The -STROBE delay and width can be controlled by
these bits.
AFR BIT-3:
Interrupt source.
0= -ACK input pin is selected as printer handshaking
source
1= BUSY input pin is selected as printer handshaking
source
AFR BIT 4-5:
Interrupt type. State of the INT output pin can be
selected for one of the following options.
Bit-2
AFR
1
1
1
1
0
0
0
0
Bit-1
AFR
0
0
1
1
0
0
1
1
Bit-0
AFR
0
1
0
1
0
1
0
1
(clocks)
TSD
10
10
18
3
5
5
9
6
(clocks)
TSW
16
2
4
4
8
4
8
8