MC74VHC541DT ON Semiconductor, MC74VHC541DT Datasheet

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MC74VHC541DT

Manufacturer Part Number
MC74VHC541DT
Description
IC BUFF/DVR 8BIT N-INV 20TSSOP
Manufacturer
ON Semiconductor
Series
74VHCr
Datasheet
1.MC74VHC541DWR2G.pdf (6 pages)

Specifications of MC74VHC541DT

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
8mA, 8mA
Voltage - Supply
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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MC74VHC541
Octal Bus Buffer
buffer fabricated with silicon gate CMOS technology. It achieves high
speed operation similar to equivalent Bipolar Schottky TTL while
maintaining CMOS low power dissipation.
OE2 are high, the terminal outputs are in the high impedance state.
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
•
•
•
•
•
•
•
•
•
•
•
•
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 5
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74VHC541 is an advanced high speed CMOS octal bus
The MC74VHC541 is a noninverting type. When either OE1 or
The internal circuit is composed of three stages, including a buffer
High Speed: t
Low Power Dissipation: I
High Noise Immunity: V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 134 FETs or 33.5 Equivalent Gates
Pb−Free Packages are Available*
ENABLES
OUTPUT
INPUTS
DATA
A1
A2
A3
A4
A5
A6
A7
A8
OE1
OE2
PD
OLP
2
3
4
5
6
7
8
9
= 3.7ns (Typ) at V
1
19
= 1.2 V (Max)
Figure 1. Logic Diagram
NIH
CC
= 4 mA (Max) at T
= V
NIL
CC
= 28% V
= 5.0 V
18
17
16
15
14
13
12
11
CC
A
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
= 25°C
NONINVERTING
OUTPUTS
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
See general marking information in the device marking
section on page 4 of this data sheet.
20
20
20
DEVICE MARKING INFORMATION
OE1
ORDERING INFORMATION
H
L
L
X
1
GND
1
OE1
1
A4
A1
A2
A3
A5
A6
A7
A8
Inputs
http://onsemi.com
PIN ASSIGNMENT
FUNCTION TABLE
OE2
X
H
L
L
1
2
3
4
5
6
7
8
9
10
A
H
X
X
L
Publication Order Number:
20
19
18
17
16
15
14
13
12
11
Output Y
SOIC−20WB
SUFFIX DW
CASE 751D
CASE 948E
SOEIAJ−20
SUFFIX DT
TSSOP−20
SUFFIX M
CASE 967
MC74VHC541/D
V
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
H
L
Z
Z
CC

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MC74VHC541DT Summary of contents

Page 1

... DATA INPUTS OE1 OUTPUT ENABLES 19 OE2 Figure 1. Logic Diagram *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 April, 2006 − Rev 5 25° 28 ...

Page 2

MAXIMUM RATINGS Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 3

AC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 4

... Figure 4. ORDERING INFORMATION Device MC74VHC541DWR2 MC74VHC541DWR2G MC74VHC541DT MC74VHC541DTG MC74VHC541DTR2 MC74VHC541DTR2G MC74VHC541MEL MC74VHC541MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. SOIC−20WB 20 20 ...

Page 5

20X T 0. 18X A1 K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 ...

Page 6

... E L DETAIL P VIEW American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 6 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. ...

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