PIC16F871 Microchip Technology Inc., PIC16F871 Datasheet - Page 30

• Manufacturer Part Number: PIC16F871
• Description: 28/40-pin, 8-bit Cmos Flash Microcontrollers
• Manufacturer: Microchip Technology Inc.

PIC16F870/871
Write operations have two control bits, WR and WREN,
and two status bits, WRERR and EEIF. The WREN bit
is used to enable or disable the write operation. When
WREN is clear, the write operation will be disabled.
Therefore, the WREN bit must be set before executing
a write operation. The WR bit is used to initiate the write
operation. It also is automatically cleared at the end of
the write operation. The interrupt flag EEIF is used to
determine when the memory write completes. This flag
must be cleared in software before setting the WR bit.
For EEPROM data memory, once the WREN bit and
the WR bit have been set, the desired memory address
in EEADR will be erased, followed by a write of the data
in EEDATA. This operation takes place in parallel with
the microcontroller continuing to execute normally.
When the write is complete, the EEIF flag bit will be set.
For program memory, once the WREN bit and the WR
bit have been set, the microcontroller will cease to exe-
REGISTER 3-1:
DS30569B-page 28
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
EECON1 REGISTER (ADDRESS: 18Ch)
bit 7
EEPGD: Program/Data EEPROM Select bit
1 = Accesses program memory
0 = Accesses data memory
(This bit cannot be changed while a read or write operation is in progress.)
Unimplemented: Read as '0'
WRERR: EEPROM Error Flag bit
1 = A write operation is prematurely terminated (any MCLR Reset or any WDT Reset during
0 = The write operation completed
WREN: EEPROM Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the EEPROM
WR: Write Control bit
1 = Initiates a write cycle. (The bit is cleared by hardware once write is complete. The WR bit
0 = Write cycle to the EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read. (RD is cleared in hardware. The RD bit can only be set (not
0 = Does not initiate an EEPROM read
Legend:
R = Readable bit
- n = Value at POR
EEPGD
R/W-x
normal operation)
can only be set (not cleared) in software.)
cleared) in software.)
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
cute instructions. The desired memory location pointed
to by EEADRH:EEADR will be erased. Then, the data
value in EEDATH:EEDATA will be programmed. When
complete, the EEIF flag bit will be set and the
microcontroller will continue to execute code.
The WRERR bit is used to indicate when the
PIC16F870/871 devices have been reset during a write
operation. WRERR should be cleared after Power-on
Reset. Thereafter, it should be checked on any other
RESET. The WRERR bit is set when a write operation
is interrupted by a MCLR Reset, or a WDT Time-out
Reset, during normal operation. In these situations, fol-
lowing a RESET, the user should check the WRERR bit
and rewrite the memory location, if set. The contents of
the data registers, address registers and EEPGD bit
are not affected by either MCLR Reset, or WDT
Time-out Reset, during normal operation.
WRERR
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-x
WREN
R/W-0
 2003 Microchip Technology Inc.
x = Bit is unknown
R/S-0
WR
R/S-0
RD
bit 0