PIC16C782 Microchip Technology Inc., PIC16C782 Datasheet - Page 57

• Manufacturer Part Number: PIC16C782
• Description: 8-bit Cmos Microcontrollers With A/d, D/a, Opamp, Comparators And Psmc
• Manufacturer: Microchip Technology Inc.

6.0
The Timer1 module timer/counter has the following
features:
• 16-bit timer/counter
• Readable and writable (both registers)
• Internal or external clock select
• Interrupt on overflow from FFFFh to 0000h
• External enable input (T1G pin with TMR1GE bit = 1)
• Option for Timer1 to use LP oscillator if device is
Timer1 Control register (T1CON) is shown in Register 6-1.
Figure 6-2 is a simplified block diagram of the Timer1
module.
6.1
Timer1 can operate in one of three modes:
1.
2.
3.
In Timer mode, Timer1 is incremented on every instruc-
tion cycle. In Counter mode, Timer1 is incremented on
the rising edge of the external clock input T1CKI (RA6/
OSC2/CLKOUT/T1CKI). In addition, the Counter mode
clock can be synchronized to the microcontroller clock
or run asynchronously.
In Counter and Timer modes, the counter/timer clock
can be gated by the T1G input.
If an external clock oscillator is needed (and the micro-
controller is using INTRC w/o CLKOUT), Timer1 can
use the LP oscillator as a clock source.
(two 8-bit registers:TMR1H and TMR1L)
configured to use INTRC w/o CLKOUT
2001 Microchip Technology Inc.
Note 1: In Counter mode, the counter increments
16-bit timer with prescaler.
16-bit synchronous counter.
16-bit asynchronous counter.
TIMER1 MODULE WITH GATE
CONTROL
Timer1 Operation
on the rising edge of the clock.
Preliminary
EXAMPLE 6-1:
;* This code block will configure Timer1 for
;* Polling, Ext gate of int clk (Fosc/4), &
;* 1:1 prescaler.
;*
;* Wait for TMR1 overflow code included
;*
;********************************************
;* Wait for TMR1 overflow
T1_OVFL_WAIT
BANKSEL TMR1L
CLRF
CLRF
MOVLW
MOVWF
BSF
BANKSEL PIR1
T1_WAIT
TBFSS
GOTO
BCF
TMR1L
TMR1H
B’01000000’
T1CON
T1CON,TMR1ON
PIR1,TMR1IF
T1_WAIT
PIR1,TMR1IF
PIC16C781/782
TIMER1 INITIALIZATION
; Select Bank 0
; Clear TMR1 LSB
; Clear TMR1 MSB
; Gate, Ps 1:1
; Int clk
; Enable timer
; Select Bank 0
;
; Overflow?
; If 0, again
; Clear flag
DS41171A-page 55