AT91SAM7XC512 ATMEL Corporation, AT91SAM7XC512 Datasheet - Page 2

• Manufacturer Part Number: AT91SAM7XC512
• Description: At91 Arm Thumb-based Microcontrollers
• Manufacturer: ATMEL Corporation

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Two Parallel Input/Output Controllers (PIO)
Seventeen Peripheral DMA Controller (PDC) Channels
One Advanced Encryption System (AES)
One Triple Data Encryption System (TDES)
One USB 2.0 Full Speed (12 Mbits per second) Device Port
One Ethernet MAC 10/100 base-T
One Part 2.0A and Part 2.0B Compliant CAN Controller
One Synchronous Serial Controller (SSC)
Two Universal Synchronous/Asynchronous Receiver Transmitters (USART)
Two Master/Slave Serial Peripheral Interfaces (SPI)
One Three-channel 16-bit Timer/Counter (TC)
One Four-channel 16-bit Power Width Modulation Controller (PWMC)
One Two-wire Interface (TWI)
One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os
SAM-BA
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
5V-tolerant I/Os, Including Four High-current Drive I/O lines, Up to 16 mA Each
Power Supplies
Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions
Available in 100-lead LQFP Green and 100-ball TFBGA Green Packages
– Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– 256-, 192-, 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications (AT91SAM7XC512)
– 128-bit Key Algorithm, Compliant with FIPS PUB 197 Specifications (AT91SAM7XC256/128)
– Buffer Encryption/Decryption Capabilities with PDC
– Two-key or Three-key Algorithms, Compliant with FIPS PUB 46-3 Specifications
– Optimized for Triple Data Encryption Capability
– On-chip Transceiver, 1352-byte Configurable Integrated FIFOs
– Media Independent Interface (MII) or Reduced Media Independent Interface (RMII)
– Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and Receive
– Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp Counter
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– Full Modem Line Support on USART1
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
– Master Mode Support Only, All Two-wire Atmel
– Default Boot program
– Interface with SAM-BA Graphic User Interface
– Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components
– 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply
– 1.8V VDDCORE Core Power Supply with Brownout Detector
AT91SAM7XC/512/256/128 Preliminary Summary
™
Boot Assistant
®
EEPROMs Supported
6209BS–ATARM–03-Sep-06