ADT7460 Analog Devices, Inc., ADT7460 Datasheet - Page 30

• Manufacturer Part Number: ADT7460
• Description: Dbcool? Remote Thermal Controller And Fan Controller
• Manufacturer: Analog Devices, Inc.

ADT7460
Fan Speed Measure
Th
directly because the fa
would take several sec
and
measured by gating an
of a 16-bit counter for
(Figure 52). The accum
th
speed.
N
o
register contain
(default), three, or four TACH pulses to be counted.
The fan tachometer readings are 16-bit values consisting of a
2-byte read from the ADT7460.
Table 30. Fan Speed Measurement Registers
Register
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
CLOCK
PWM
TACH
f Register 0x7B (fan pulses per revolution register). This
, the number of pulses counted, is determined by the settings
e fan tachometer period and inversely proportional to the fan
Figure
e fan
12V
acc
urate c
51. Fan
count
1
2
er does n
ount. In
with Stro
3
<1kΩ
s two bits for each fan, allowing one, two
4
Figure 52
Description
TACH1 low byte
TACH1 high byte
TACH2 low byte
TACH2 high byte
TACH3 low byte
TACH3 high byte
TACH4 Low byte
TACH4 high byte
ment
ng TACH Pull-Up to > V
n speed may be less than 1000 RPM. It
onds to accumulate a reasonably large
stead, the period of the fan revolution is
N periods of the fan TACH output
Attenuated with R1/R2
ot count the fan TACH output pulses
on-chip 90 kHz oscillator into the input
TACH
OUTPUT
ulated cou
. Fan Speed Meas
R1*
*SEE TEXT
R2*
nt is actually proportional to
TACH
urement
CC
or Totem-Pole Output,
ADT7460
FAN SPEED
COUNTER
V
CC
Default
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Rev. C | Page 30 of 52
Reading Fan Speed from the ADT7460
If fan speeds are being measured, this involves a 2-register read
fo
ca
registers are read from. This prevents erroneous TACH readings
The fan tachom
11.11 µs period clocks (9
co
r
p
m
slo
r
tha
H
Since the actual fan TACH period is b
a fan TACH limit by 1 sets the appropriate status bit and can b
used to generate an SMBALERT .
The fan TACH limit registers are 16-bit values consisting of two
bytes.
Table 31. Fan TACH Limit Registers
Register
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
Fan Speed Measurement Rate
The fan TACH readings are normally updated once every
second.
The FAST bit (Bit 3) of Configuration Register 3 (Re
when set, updates the
If any o the fan
a
b
r
dir
ising ed e of the third fa
eading
eadings o be taken on
re inste
er revo tion are being
it in Co figuration Re
igh Limit: > Comparison Performed
r each measurement. The low byte should be read first. This
uses the high byte to be frozen until both high and low byte
easuri
unter, om the rising e
wer t
ectly to a dc source.
t it is unning very slo
f
he fan is
ng t
of
lu
ad
fr
g
r
n
t
0xFFFF indica
powered dir
he fan TACH
Description
TACH1 minimum low byte
TACH1 minimum high byte
TACH2 minimum low byte
TACH2 minimum high byte
TACH3 inimum low b
TACH3 minimum high byte
TACH4 minimum low byte
TACH4 minimum high byte
eter read
s are no
actually
fa
m
gister 3 should
t being driven b
ectly from 5 V
n TACH readin
a continuous b
ing registers report the number of
counted). Since the devi
0 kHz oscill
running. A 16-
n TACH pulse
tes either t
wly (<100
dge of the first fan TACH p
period, the hi
hat the fan has stalled or
RPM).
ator) gated to the fan speed
eing measured, exceeding
yte
or 12 V, its associated dc
be set. This allows TACH
asis for fans connected
y a PWM channel but
gher the count value the
gs every 250 ms.
bit fan tachometer
(assuming two pulses
ce is essentially
g. 0x78),
ulse to the
Defaul
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
0xFF
t
e
.