ADT7476 Analog Devices, Inc., ADT7476 Datasheet - Page 16

• Manufacturer Part Number: ADT7476
• Description: Dbcool Remote Thermal Controller And Voltage Monitor
• Manufacturer: Analog Devices, Inc.

ADT7476
Write Byte
In this operation, the master device sends a command byte
and one data byte to the slave device, as follows:
1.
2.
3.
4.
5.
6.
7.
8.
This operation is illustrated in Figure 22.
READ OPERATIONS
The ADT7476 uses the following SMBus read protocols.
Receive Byte
This operation is useful when repeatedly reading a single
register. The register address is set up previously. In this
operation, the master device receives a single byte from a slave
device, as follows:
1.
2.
3.
4.
5.
6.
In the ADT7476, the receive byte protocol is used to read a
single byte of data from a register whose address has been set by
a send byte or write byte operation. This operation is illustrated
in Figure 23.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
The addressed slave device asserts ACK on SDA.
The master receives a data byte.
The master asserts NO ACK on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (active low).
The addressed slave device asserts ACK on SDA.
The master sends a command code.
The slave asserts ACK on SDA.
The master sends a data byte.
The slave asserts ACK on SDA.
The master asserts a stop condition on SDA,
and the transaction ends.
S
1
ADDRESS W A
Figure 23. Single-Byte Read from a Register
SLAVE
Figure 22. Single-Byte Write to a Register
2
S
1
ADDRESS
SLAVE
2
3
REGISTER
ADDRESS
R
3
A
4
DATA
4
A
5
DATA
A
5
6
6
P
A P
7 8
Rev. B | Page 16 of 72
Alert Response Address
Alert response address (ARA) is a feature of SMBus devices that
allows an interrupting device to identify itself to the host when
multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt out-
put or an SMBALERT . One or more outputs can be connected
to a common SMBALERT line connected to the master. If a device
SMBALERT line goes low, the following procedure occurs:
1.
2.
3.
4.
5.
SMBus TIMEOUT
The ADT7476 includes an SMBus timeout feature. If there is no
SMBus activity for 35 ms, the ADT7476 assumes that the bus is
locked and releases the bus. This prevents the device from
locking or holding the SMBus expecting data. Some SMBus
controllers cannot handle the SMBus timeout feature, so it can
be disabled.
Configuration Register 1 (0x40)
Bit 6 TODIS = 0, SMBus timeout disabled (default)
Bit 6 TODIS = 1, SMBus timeout enabled
VIRUS PROTECTION
To prevent rogue programs or viruses from accessing critical
ADT7476 register settings, the lock bit can be set. Setting Bit 1
of Configuration Register 1 (0x40) sets the lock bit and locks
critical registers. In this mode, certain registers can no longer be
written to until the ADT7476 is powered down and powered up
again. For more information on which registers are locked, see
the Register Tables section.
SMBALERT is pulled low.
The master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
The device whose SMBALERT output is low responds to
the alert response address, and the master reads its device
address. The address of this device is now known and can
be interrogated in the usual way.
If more than one device’s SMBALERT output is low, the
one with the lowest device address has priority in accor-
dance with normal SMBus arbitration.
Once the ADT7476 has responded to the alert response
address, the master must read the status registers, and the
SMBALERT is cleared only if the error condition is gone.