EVB71121 Melexis Company, EVB71121 Datasheet - Page 4

• Manufacturer Part Number: EVB71121
• Description: Evaluation Board For Mlx71121
• Manufacturer: Melexis Company

1.3
The MLX71121 receiver IC consists of the following building blocks:
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39012 71121 01
Rev. 003
PLL synthesizer (PLL SYNTH) to generate the first and second local oscillator signals LO1 and LO2.
The PLL SYNTH consists of a fully integrated voltage-controlled oscillator (VCO), a distributed feedback
divider chain (N1, N2), a phase-frequency detector (PFD) a charge pump (CP), a loop filter (LF) and a
crystal-based reference oscillator (RO).
Two low-noise amplifiers (LNA) for high-sensitivity RF signal reception
First mixer (MIX1) for down-conversion of the RF signal to the first IF (intermediate frequency)
Second mixer (MIX2) with image rejection for down-conversion from the first to the second IF
IF Filter (IFF) with a 1.8MHz center frequency and a 300kHz 3dB bandwidth
IF amplifier (IFA) to provide a high voltage gain and an RSSI signal output
FSK demodulator (FSK DEMOD)
Operational amplifiers OA1 and OA2 for low-pass filtering and data slicing, respectively
Positive (PKDET+) and negative (PKDET-) peak detectors
Switches SW1 to select between FSK and ASK as well as SW2 to chose between averaging or peak
detection mode.
Noise cancellation filter (NCF)
Sequencer circuit (SEQ) and biasing (BIAS) circuit
Clock output (DIV8)
Block Diagram
7
VEE
2
1
32
LNAI2
8
VEE
31
26
LNASEL
RFSEL
TEST
LNAI1
LNA1
LNA2
3
BIAS
30
SEQ
6
4
5
MIX1
LO1
VCO
counter
9
N1
Fig. 1:
MIX2
10
LF
LO2
counter
N2
MLX71121 block diagram
11
IFF
Page 4 of 18
CP
12
PFD
13
RO
27
25
IFA
24
Evaluation Board Description
DIV 8
28
ASK
DEMOD
FSK
FSK
300 to 930MHz Receiver
14
15
SW1
SW2
100k
22
17
EVB71121
19
100k
16
OA2
PKDET+
PKDET _
OA1
EVB Description
NCF
DTAO
CINT
DFO
PDP
PDN
18
20
29
23
21
Jan/08