ATA5760 ATMEL Corporation, ATA5760 Datasheet - Page 10

• Manufacturer Part Number: ATA5760
• Description: Ata5760 Uhf Ask/fsk Receiver
• Manufacturer: ATMEL Corporation

8. Polling Mode
8.1
10
Sleep Mode
ATA5760/ATA5761
According to
three different modes. In sleep mode the signal processing circuitry is disabled for the time
period T
nal processing circuits are enabled and settled. In the following bit-check mode, the incoming
data stream is analyzed bit by bit contra a valid transmitter signal. If no valid signal is present,
the receiver is set back to sleep mode after the period T
check as it is a statistical process. An average value for T
teristics. During T
receiver is indicated on pin IC_ACTIVE. The average current consumption in polling mode is
dependent on the duty cycle of the active mode and can be calculated as:
During T
reception of a transmitted command the transmitter must start the telegram with an adequate
preburst. The required length of the preburst depends on the polling parameters T
T
depends on the actual bit rate and the number of bits (N
The following formula indicates how to calculate the preburst length.
T
The length of period T
sion factor X
calculated to be:
T
In US- and European applications, the maximum value of T
to 1. The time resolution is about 2 ms in that case. The sleep time can be extended to almost
half a second by setting X
According to
permanent sleep condition. The receiver remains in that condition until another value for Sleep is
programmed into the OPMODE register. This function is desirable where several devices share
a single data line and may also be used for microcontroller polling – via pin POLLING/_ON, the
receiver can be switched on and off.
Spoll
Bit-check
Preburst
Sleep
=
= Sleep
I
--------------------------------------------------------------------------------------------------------------- -
Sleep
Soff
and the start-up time of a connected microcontroller (T
Sleep
T
Sleep
while consuming low current of I
Figure 8-4 on page
Sleep
Table 11-7 on page
and T
T
T
+ T
Sleep
X
Sleep
Sleep
Startup
(according to
Startup
Startup
+
Sleep
+
I
Son
T
and T
+ T
1024
Startup
the receiver is not sensitive to a transmitter signal. To guarantee the
Sleep
is defined by the 5-bit word Sleep of the OPMODE register, the exten-
Bit-check
Bit-check
T
to 8. X
+
Startup
Table 11-8 on page
T
13, the receiver stays in polling mode in a continuous cycle of
T
25, the highest register value of sleep sets the receiver into a
Clk
Bit-check
+ T
Sleep
the current consumption is I
+
Start_microcontroller
T
Bit-check
can be set to 8 by bit X
S
= I
Soff
. During the start-up period, T
25), and the basic clock cycle T
Bit-check
Bit-check
Bit-check
Sleep
) to be tested.
is given in the electrical charac-
Start_microcontroller
SleepStd
. This period varies check by
is about 60 ms if X
S
= I
Son
to’1’.
. The condition of the
). Thus, T
4896C–RKE–04/06
Startup
Sleep
Sleep
, T
, all sig-
Clk
Bit-check
Startup
is set
. It is
,