ATA6624 ATMEL Corporation, ATA6624 Datasheet
ATA6624
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ATA6624 Summary of contents
Page 1
... The ATA6624 has the same functionality as the ATA6622; however, it uses a 5V/50 mA regulator. The ATA6626 has the same func- tionality as ATA6624 without a TXD time-out timer. The voltage regulator is able to source 18V. The output current of the regulator can be boosted by S using an external NPN transistor ...
Page 2
... RXD 4 WAKE 16 Edge KL_15 Detection PVCC TXD 11 Time-out TXD Timer *) 1 Debounce EN Time 5 GND *) Not in ATA6626 ATA6622/ATA6624/ATA6626 2 Receiver Wake-up Bus Timer Slew Rate Control Control Unit Mode Select Internal Testing Watchdog Unit PVCC MODE TM NTRIG Normal and Fail-safe Mode RF Filter Short Circuit and ...
Page 3
... Ignition detection (edge sensitive) 17 GND System ground (optional) 18 PVCC 3.3V/5V regulator sense input pin 19 VCC 3.3V/5V regulator output/driver pin 20 VS Battery supply Backside Heat slug is connected to all GND pins 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 ATA6622/24/26 GND 2 14 QFN NTRIG ...
Page 4
... GND shifts or battery disconnection. LIN receiver thresholds are compatible with the LIN protocol specification. The fall time from recessive to dominant bus state and the rise time from dominant to recessive bus state are slope controlled. ATA6622/ATA6624/ATA6626 27V. An undervoltage detection is implemented to dis- ...
Page 5
... Mode Input Pin (MODE) Connect the MODE pin directly or via an external resistor to GND for normal watchdog opera- tion. To debug the software of the connected microcontroller, connect MODE pin to 3.3V/5V and the watchdog is switched off. 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 typ. 57 µA. The VCC VS > 6 ms, the DOM = 0V) ...
Page 6
... Wake-up Events from Sleep or Silent Mode • LIN-bus • WAKE pin • EN pin • KL_15 ATA6622/ATA6624/ATA6626 possible to switch the IC into Sleep or Silent Mode. Connect the KL_15 pin Batt . To protect this pin against voltage transients, a serial resistor and a ceramic and, therefore, the sensitivity against transients on the ignition Kl.30. ...
Page 7
... LIN pin and the VS pin is present. Silent Mode can be activated independently from the actual level on the LIN, WAKE, or KL_15 pins undervoltage condi- tion occurs, the NRES is switched to low, and the IC changes its state to Fail-safe Mode. 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 Unpowered Mode ...
Page 8
... The device switches from Silent Mode to Fail-safe Mode. The internal LIN slave termination resistor is switched on. The remote wake-up request is indicated by a low level at the RXD pin to interrupt the microcontroller (see used to switch directly to Normal Mode. ATA6622/ATA6624/ATA6626 8 Switch to Silent Mode Normal Mode ...
Page 9
... Node in silent mode High Watchdog off Silent mode 3.3V/5V/ Undervoltage detection active ) and a rising edge at pin LIN respectively result in a remote wake-up request. The bus ATA6622/ATA6624/ATA6626 Fail-safe mode Low Start watchdog lead time t d Fail safe mode 3.3V/5V/50 mA (Figure 4-4 on page 10). The transmission path is from V is typically 10 µ ...
Page 10
... If you connect battery voltage to the application circuit, the voltage at the VS pin increases according to the block capacitor (see undervoltage threshold VS The VCC output voltage reaches its nominal value after t VCC capacitor and the load. The NRES is low for the reset time delay t possible. ATA6622/ATA6624/ATA6626 10 Figure 4-5 on page 11). Switch to Sleep Mode Normal Mode EN ...
Page 11
... Low or floating Off state EN Floating Watchdog off Table of Modes Transceiver VCC Watchdog Off 3.3V/5V On 3.3V/5V Off 3.3V/5V Off 0V ATA6622/ATA6624/ATA6626 Fail-safe Mode Low On state Regulator wake-up time Reset time Microcontroller start-up time delay Start watchdog lead time t d WD_OSC INH On 1.23V On On 1.23V On Off ...
Page 12
... RXD pin), as well as the wake-up source flag (signalled on the TXD pin), is immediately reset if the microcontroller sets the EN pin to high (see 4-2 on page 8 flag is stored and signalled in Fail-safe Mode at the TXD pin. ATA6622/ATA6624/ATA6626 12 ) and a rising edge at pin LIN result in a remote wake-up request. The device BUS ...
Page 13
... C > 10 µF and a ceramic capacitor with C = 100 nF. The values of these capacitors can be var- ied by the customer, depending on the application. The main power dissipation of the IC is created from the VCC output current I needed for the application. In ATA6622/ATA6624/ATA6626 is shown. 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 , the output limits the output current to I ...
Page 14
... Figure 5-1. Figure 5-2. For programming purposes of the microcontroller it is potentially necessary to supply the V output via an external power supply while the V This behavior is no problem for the system basis chip. ATA6622/ATA6624/ATA6626 14 VCC Voltage Regulator: Ramp-up and Undervoltage Detection VS 12V 5.5V/3.8V 5V/3.3V V thun T T VCC Reset NRES 5V/3 ...
Page 15
... If the triggering signal fails in this open window t output will be drawn to ground. A triggering signal during the closed window t switches NRES to low. 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 . The trigger signal must exceed a minimum time After wake up from Sleep or Silent Mode, the lead time ...
Page 16
... A microcontroller with an oscillator tolerance of ±15% is sufficient to supply the trigger inputs correctly. Table 6-1. R WD_OSC 120 ATA6622/ATA6624/ATA6626 16 Timing Sequence with R WD_OSC Undervoltage Reset reset t = 155 > 200 ns trig = 51 k WD_OSC ...
Page 17
... Pin VS, LIN, WAKE to GND Junction temperature Storage temperature Thermal resistance junction to heat slug Thermal resistance junction to ambient, where heat slug is soldered to PCB Thermal shutdown of VCC regulator Thermal shutdown of LIN output Thermal shutdown hysteresis 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 Symbol Min. V –0 – ...
Page 18
... High-level voltage input 3.3 Pull-up resistor V High-level leakage 3.4 V current Fail-safe Mode Low-level input current at V 3.5 local wake-up request Type means 100% tested 100% correlation tested Characterized on samples Design parameter ATA6622/ATA6624/ATA6626 18 Pin VS > V – 0.5V VS LIN S < 14V (T = 25° > V – 0.5V LIN St < ...
Page 19
... MODE = – 27V 27V INH S LIN = 7V VS LIN = 500 load = 18V VS LIN = 500 load = 7.0V VS LIN = 1000 load = 18V VS LIN = 1000 load LIN LIN ATA6622/ATA6624/ATA6626 Symbol Min. Typ. Max. V –0.3 +0.8 ENL ENH 0. 125 200 EN I – –0.3 +0.8 NTRIGL V ...
Page 20
... Normal Mode via EN pin Time delay for mode change from Normal 10.3 V Mode to Sleep Mode via EN pin TXD dominant time-out 10.4 V timer (ATA6626 disabled) *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter ATA6622/ATA6624/ATA6626 20 Pin LIN I BUS_PAS_dom = 0V BUS = 12V Batt < 18V Batt LIN I < ...
Page 21
... Slope RXD = 7.0V to 18V S = max rx_pdr rx_pdf = 7.0V to 18V – t rx_pdr rx_pdf 5. 250 µ 5. NRES 5. NRES ATA6622/ATA6624/ATA6626 Symbol Min. Typ. Max s_n D1 0.396 D2 0.581 D3 0.417 D4 0.590 t SLOPE_fall 3.5 22.5 t SLOPE_rise = 20 pF RXD t 6 rx_pd t –2 +2 ...
Page 22
... Initializes a wake-up signal V 16.3 WAKE pull-up current V High-level leakage V 16.4 current V Time of low pulse for 16.5 V wake-up via WAKE pin *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter ATA6622/ATA6624/ATA6626 22 Pin = –200 µ OSC = 51 k OSC = 91 k OSC = 120 k OSC OSC < ...
Page 23
... VCC undervoltage Referred to VCC 17.10 threshold V Hysteresis of Referred to VCC 17.11 undervoltage threshold V Ramp-up time V > 17. 3. load 18 VCC Voltage Regulator ATA6624/ATA6626 5.5V < V 18.1 Output voltage VCC ( mA) Output voltage VCC at 18.2 4V < V low VS V 18.3 Regulator drop voltage I VCC V 18.4 Regulator drop voltage I VCC V 18.5 ...
Page 24
... Definition of Bus Timing Characteristics TXD (Input to transmitting node) TH Rec(max Dom(max) (Transceiver supply of transmitting node) TH Rec(min) TH Dom(min) RXD (Output of receiving node1) t rx_pdf(1) RXD (Output of receiving node2) ATA6622/ATA6624/ATA6626 Bit Bit t Bus_dom(max) LIN Bus Signal t Bus_dom(min) t rx_pdr(2) t Bit t Bus_rec(min) Thresholds of receiving node1 Thresholds of ...
Page 25
... Figure 8-2. Application Circuit V Battery KL30 + 100 nF 10 µ Microcontroller EN NTRIG RXD TXD RESET 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 22 µF 100 ATA6622/24/ NTRIG MLP 0.65 mm pitch 33 k WAKE 20 lead 4 GND 5 Wake switch 6 7 Ignition KL15 47 k Master node ...
Page 26
... Figure 8-3. Application Circuit with External NPN V Battery KL30 + 100 nF 10 µ Microcontroller EN NTRIG RXD TXD RESET ATA6622/ATA6624/ATA6626 26 22 µF 100 2.2 µF 3 ATA6622/24/ NTRIG MLP 0.65 mm pitch 33 k WAKE 20 lead 4 GND 5 Wake switch 6 7 Ignition KL15 ...
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... Package: VQFN_5 x 5_20L Exposed pad 3.1 x 3.1 Dimensions in mm Not indicated tolerances ±0.05 Pin 1 identification Drawing-No.: 6.543-5129.01-4 Issue: 2; 09.02.07 4986E–AUTO–02/08 ATA6622/ATA6624/ATA6626 Package Remarks QFN20 3.3V LIN system-basis-chip, Pb-free, 1.5k, taped and reeled QFN20 5V LIN system-basis-chip, Pb-free, 1.5k, taped and reeled QFN20 3.3V LIN system-basis-chip, Pb-free, 6k, taped and reeled ...
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... Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this document. Revision No. 4986E-AUTO-02/08 4986D-AUTO-10/07 4986C-AUTO-09/07 4986B-AUTO-06/07 ATA6622/ATA6624/ATA6626 28 History Figure 2-1 on page 3 renamed Figure 6-1 “Timing Sequence with R changed Figure 8-3 “Application Circuit with External NPN” on page 26 added Section 9 “ ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2008 Atmel Corporation. All rights reserved. Atmel Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...