HT0610 Holtek Semiconductor Inc., HT0610 Datasheet - Page 15
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HT0610
Manufacturer Part Number
HT0610
Description
Ht0610 -- 33x120 Lcd Driver
Manufacturer
Holtek Semiconductor Inc.
Datasheet
1.HT0610.pdf
(22 pages)
Command Table
Rev. 1.10
00000X
000011X
0001X
0001X
0010000X
0010001X
0010010X
0010011X
0010100X
0010101X
0010110X
0010111X
0011000X
0011001X
0011010X
00110110
00110111
Bit Pattern
(D7~D0)
3
3
X
X
2
X
2
2
1
X
X
X
1
0
0
0
0
0
0
0
0
0
0
0
X
1
1
0
X
X
0
0
0
Set BGDRAM Page Address
Set Icon Line/Annunciator
Contrast Level
Set Contrast Level
Read Contrast Value
Set Voltage Doubler/Tripler
Set Column Mapping
Set Row Mapping
Reserved
Set Display On/Off
Set DC/DC Converter On/Off
Set Internal Regulator On/Off
Set Internal Voltage Divider
On/Off
Set Internal Contrast Control
On/Off
Set Clock Frequency
Save/Restore RAM Column
Address
Master Clear RAM
Master Clear Icons
Command
Set BGDRAM page address using X
X
X
X
X
X
Set one of the 4 available values to the icon and annunciator con-
trast, using X
X
X
X
X
Set one of the 16 available values to the internal contrast register,
using X
during POR
With DCOM pin input low, RW pin input high, and D7~d4 pins
equal to 0001 at the rising edge of CS, the value of the internal con-
trast register will be latched out at D3, D2, D1 and D0 pins, i.e.
X
X
X
X
X
X
X
X
X
X
X
X
X
When the application employs external contrast control, the inter-
nal contrast control, temperature compensation and the regulator
must be enabled.
X
X
When an external bias network is preferred, the voltage divider
should be disabled.
X
X
Internal contrast circuits can be disabled if external contrast circuit
is preferred.
X
X
X
X
Master clear BGDRAM page 1 to 4
Master clear of BGDRAM page 5
2
2
2
2
2
1
1
1
1
3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
=0: Select voltage tripler (POR initial state)
=1: Select voltage doubler
=0: COL0 to SEG0 (POR initial state)
=1: COL0 to SEG119
=0: ROW0 to COM0 (POR initial state)
=1: ROW0 to COM31
=0: Display off (POR initial state)
=1: Display on
=0: DC/DC converter off (POR initial state)
=1: DC/DC converter on
=0: Internal regulator off (POR initial state)
=1: Internal regulator on
=0: Internal voltage divider off (POR initial state)
=1: Internal voltage divider on
=0: Internal contrast control off (POR initial state)
=1: Internal contrast control on
=0: Low frequency (38.4kHz) (POR initial state)
=1: High frequency (50kHz)
=0: Restore address
=1: Save address
1
1
1
1
1
0
0
0
0
2
X
X
X
X
X
=00 (Von=0.87VDD)
=01 (Von=0.71VDD)
=10 (Von=0.61VDD) (POR initial state)
=11 (Von=0.55VDD)
X
0
0
0
0
0
1
15
=000: page 1 (POR; initial state)
=001: page 2
=010: page 3
=011: page 4
=100: page 5
X
3
X
0
2
at the rising edge of CS.
X
1
X
1
X
0
0
as data bits. The contrast register is reset to 0000
as data bits.
Comment
2
X
1
X
0
as address bits.
April 4, 2007
HT0610