HV732 Supertex, Inc., HV732 Datasheet - Page 9

• Manufacturer Part Number: HV732
• Description: High Speed ?100v 2 Integrated Ultrasound Pulser
• Manufacturer: Supertex, Inc.

Pin Description
Note: The three thermal slabs on the bottom of the package must be externally connected PAD1 to VSUB, PAD2 to TXN, and PAD3 to TXP.
10, 11, 12,
20, 21, 22,
13, 14
15, 16
18, 19
23, 24
29, 30
32, 33
4, 5
Pin
17
25
26
27
28
31
34
35
36
37
38
39
40
41
42
43
44
1
2
3
6
7
8
9
Function
RGNDN
RGNDP
NGATE
CLAMP
PGATE
DMPO
OUTN
AGND
DAMP
VSUB
OUTP
VSUB
AVDD
VSUB
DMPI
GND
GND
NDR
VDD
VNN
VDD
PDR
TXN
VPP
VLN
TXP
PIN
VLL
NIN
NC
EN
Description
Output of low voltage drive buffer for P-channel damp, 10nF external cap to pin 34 (DMPI)
Drive power ground
Output of low voltage drive buffer for N-DMOS, 10nF external cap to pin 9 (NGATE)
Positive voltage supply for drive circuitry (+12V)
Substrate connection of control / driver die chip (connected to the most positive supply, VPP)
Ground return of damp N-DMOS source
Output of damp N-DMOS drain (open drain output)
Gate input of the high voltage N-DMOS, 10nF external cap from pin 3 (NDR)
Negative high voltage power supply (-100V)
Output of the high voltage N-DMOS drain (open drain output)
No connection
Output of the high voltage P-DMOS drain (open drain output)
Positive high voltage power supply (+100V)
Gate input of the high voltage P-DMOS, 10nF external cap from pin 31 (PDR)
Damp P-DMOS drain (open drain output)
Ground return of damp P-DMOS
Substrate connection of control / driver die chip (connected to the most positive supply, VPP)
Positive voltage supply for drive circuitry (+12V)
Output of low voltage drive buffer for P-DMOS, 10nF external cap to pin 25 (PGATE)
Drive power ground
Connects to damp power P-DMOS gate, 10nF cap to pin 1 (DMPO)
Input logic control of the high voltage P-DMOS pin 18 &19 (TXP), High = on, Low = off
Negative low voltage power supply (–5V)
Positive analog voltage power supply (+12V)
Analog signal ground (0V)
Substrate connection of control / driver chip (connected to the most positive supply)
Control / drive chip power enable High = on, Low = off. When EN = Low both damping outputs, OUTN
and OUTP, will be on.
Input of damp control on both pin 26 (OUTP) and pin 8 (OUTN), Hi = on, Low = off
Input of clamp switches on both gates of output P-DMOS and N-DMOS, High = on, Low = off (EN = High)
Positive voltage supply of low voltage logic (+1.8V to +5V)
Input logic control of the high voltage N-DMOS pin 15 & 16 (TXN), High = on, Low = off
9
HV732