PM8621-BI PMC-Sierra, Inc., PM8621-BI Datasheet - Page 47

• Manufacturer Part Number: PM8621-BI
• Description: Driver, NSE/SBS Narrowband Chipset Driver
• Manufacturer: PMC-Sierra, Inc.

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2021248, Issue 1
The in-band link has a receive FIFO depth of 8 messages. When the number of messages reaches
the capacity, the chipset driver notifies (via callback if enabled) the application the condition
requesting a readout from the FIFO. User can also set the threshold for messages in the FIFO
ranging from 1 to 8 and is notified when the number of messages reaches that threshold. In
addition, a timeout mechanism (with timeout constant 125, 250, 375, or 500 microseconds) in the
FIFO is designed to notify user of any stale messages stored in the FIFO more than the specified
timeout constant. User can call
stored in the FIFO and then calls API
message is associated with a CRC error bit and a logic high for this status signals a CRC check
failure for that message. For in-band link header bytes, user calls
all the header bytes USER[2:0], PAGE[1:0], LINK[1:0] and AUX[7:0]. It is noteworthy to point
out that the CSD uses the PAGE[1:0] bits extensively to query and update the connection page of
the remote SBS(s). User should refrain from using the PAGE bits. The rest of the header bytes
can be used freely.
For the message transmission operation, user can retrieve the header bytes being sent by
nbcsIlcGetTxHdr
similar to the receive one, also has a capacity of 8 messages. User can write multiple messages to
the FIFO for transmission. API
of the Tx FIFO for additional messages. User can then call
maximum number of messages admissible by the Tx FIFO.
PRGM Diagnostics
Pseudo-random bit sequence (PRBS) generator is provided at STS-1 granularity for all outgoing
LVDS serial links for off-link verification. In addition, a PRBS monitor is provided at STS-1
granularity for all incoming LVDS serial links for off-link verification. This block is only
applicable to SBS devices in the chipset. The
the payload type. The
register(LFSR), and the invert PRBS sequence mode or sequential mode on a per STS-1 basis and
to enable/disable the PRBS generator and monitor on each STS-1 on the working and protect
links in the SBS.
User can invoke
resynchronization and bit error insertion.
Chipset Device Diagnostics
The chipset device diagnostics API can be used to isolate/identify problems within a specified
chipset device and its interfaces. The
the register and RAM tests for the chipset driver. User can call
loopback.
nbcsPrgmResync
and alter the header bytes to be sent by
nbcsPrgmCfg
nbcsIlcGetRxNumMsg
nbcsIlcGetTxFifoLvl
and
nbcsDiagTestReg
API is designed to configure the linear feedback shift
nbcsIlcGetRxMsg
nbcsPrgmForceErr
nbcsPrgmCfgPyld
to query the total number of messages
Narrowband Chipset Device Driver Manual
is available to query the free capacity
to retrieve Rx FIFO messages. Each
nbcsIlcTxMsg
and
nbcsIlcSetTxHdr
nbcsDiagLpbk
for PRBS monitor
nbcsDiagTestRam
nbcsIlcGetRxHdr
API is available to configure
to transmit the
Software Architecture
for device
. The Tx FIFO,
API conduct
to retrieve
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