FPD87208AXA National Semiconductor, FPD87208AXA Datasheet - Page 6
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FPD87208AXA
Manufacturer Part Number
FPD87208AXA
Description
FPD87208 - +2.5V Low EMI, Low Dynamic Power XGA/WXGA TFT-LCD Timing Controller with Reduced Swing Differential Signaling RSDS OutputsRSDS Outputs
Manufacturer
National Semiconductor
Datasheet
1.FPD87208AXA.pdf
(20 pages)
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F
RPLLS
RMS
AC Electrical Characteristics
T
LVDS Data Input
Note 2: Receiver Strobe Margin is defined as the valid data sampling region at the receiver inputs.
RXCLK
Symbol
A
= 0˚C to 70˚C, V
RxCLK Frequency (LVDS)
FPD-Link Receiver
Phase Lock Loop Wake-Up Time
RxIN Strobe Margin (Note 2) and (Figure 7)
DD
= 2.5V
±
0.25V, I
Parameter
FIGURE 7. FPD-Link Receiver Input Skew Margin
PI
= 100 µA (Unless otherwise specified)
6
F = 85 MHz
Conditions
Min
400
25
20101407
Max
85
10
Units
MHz
ms
ps