CS61535A Cirrus Logic, Inc., CS61535A Datasheet - Page 33

• Manufacturer Part Number: CS61535A
• Description: T1-E1 Line Interface Unit for PCM applications
• Manufacturer: Cirrus Logic, Inc.

locked VT operation, Table A1 shows potential
sub-multiple data rates, and the impact on those
rates on the maximum gap in the output clock of
the FIFO, and depth of FIFO required. FIFO
depth will have to be increased for floating VT
operation, with 8 bits of FIFO depth being added
for each pointer alignment change that can occur.
The objective that should be met in picking a
FIFO depth and clock divider is keep the maxi-
mum gap on the output of the FIFO at 12 bits or
less. Twelve bits is the maximum jitter which can
be input to the CS61535A’s jitter attenuator with-
out causing the overflow/undeflow protection
circuit to operate. The CS61535A then removes
the remaining jitter from the signal.
The receive path also requires a bit mapping
(from 193 or 256 bits to 6480 bits). This mapping
requires an input buffer with the same depth as
use on the transmit path. This buffer also absorbs
the output jitter generated by the CS61535A’s
digital clock recovery.
DS40F2
Secondary Leakage Inductance
Primary Leakage Inductance
Interwinding Capacitance
Primary Inductance
ET-constant
Turns Ratio
Parameter
Target Rate
(MHz)
1.544
1.544
2.048
Divider
Clock
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25
Table A2. Transformer Specifications
Table A1. Locked VT FIFO Analysis
Rate (MHz)
600 H min. @ 772 kHz
1.3 H max. @ 772 kHz
0.4 H max. @ 772 kHz
Resultant
CS61535A Receiver
1.620
1.571
2.074
12 V- s min. for E1
16 V- s min. for T1
1:2 CT
23 pF max.
Transformers
Recommended transmitter and receiver trans-
former specifications for the CS61535A are
shown in Table A2. The transformers in Table A3
have been tested and recommended for use with
the CS61535A. Refer to the "Telecom Trans-
former Selection Guide" for detailed schematics
which show how to connect the line interface IC
with a particular transformer.
In applications with the CS61535A where it is ad-
vantageous to use a single transmitter transformer
for both 75
transforer may be used. Although transmitter re-
turn loss will be reduced for 75 applications, the
pulse amplitude will be correct across a 75
load.
5%
( s)
6.2
3.9
3.4
Maximum Gap
and 120
bits
10
6
7
1:1.26
1:1.15
0.3 H max. @ 772 kHz
0.4 H max. @ 772 kHz
CS61535A Transmitter
1.5 mH min. @ 772 kHz
1:1
FIFO Depth
16 V- s min. for T1
12 V- s min. for E1
Required
E1 applications, a 1:1.26
1.5 % for 75
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18 pF max.
1.5 % for 120
5 % for 100
CS61535A
E1
T1
E1
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