A3941 Allegro MicroSystems, Inc., A3941 Datasheet
A3941
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A3941 Summary of contents
Page 1
... DC motors. A unique charge pump regulator provides full (>10 V) gate drive for battery voltages down and allows the A3941 to operate with a reduced gate drive, down to 5 bootstrap capacitor is used to provide the above-battery supply voltage required for N-channel MOSFETs. An internal charge pump for the high-side drive allows DC (100% duty cycle) operation ...
Page 2
... A3941 Selection Guide Part Number A3941KLP-T 50 pieces per tube A3941KLPTR-T 4000 pieces per reel Absolute Maximum Ratings* Characteristic Load Supply Voltage Logic Inputs and Outputs V5 Pin LSS Pin VDSTH Pin SA and SB Pins VDRAIN Pin GHA and GHB Pins GLA and GLB Pins ...
Page 3
... A3941 VBB V5 +5V Reg FF1 FF2 Diagnostics and Protection VDSTH PWMH PWML Control Logic PHASE SR RESET RDEAD Automotive Full Bridge MOSFET Driver Functional Block Diagram C P CP2 CP1 Charge Pump Regulator Charge Bootstrap Pump Monitor High Side Low Side Charge Bootstrap ...
Page 4
... A3941 ELECTRICAL CHARACTERISTICS valid at T Characteristics Supply and Reference Load Supply Voltage Functional 1 Operating Range Load Supply Quiescent Current VREG Output Voltage V5 Output Voltage V5 Line Regulation V5 Load Regulation V5 Short-Circuit Current Bootstrap Diode Forward Voltage Bootstrap Diode Resistance Bootstrap Diode Current Limit ...
Page 5
... A3941 ELECTRICAL CHARACTERISTICS (continued) valid at T Characteristics Logic Inputs and Outputs FF1 and FF2 Fault Output (Open Drain) FF1 and FF2 Fault Output Leakage Current RDEAD Current 3 Input Low Voltage Input High Voltage Input Hysteresis (Except RESET Pin) Input Hysteresis (RESET Pin) ...
Page 6
... A3941 PWMH PWML t DEAD GHx GLx t P(off) Synchronous Rectification Automotive Full Bridge MOSFET Driver Timing Diagrams xHI xLO t t P(off) P(on) GHx GLx t DEAD High-Side PWM xHI xLO t P(off) GHx GLx t t P(on) P(off) Low-Side PWM Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. ...
Page 7
... Cross- conduction (shoot through) in the external bridge is avoided by an adjustable dead time. A low power sleep mode allows the A3941, the power bridge, and the load to remain connected to a vehicle battery supply without the need for an additional supply switch. ...
Page 8
... A3941 In some applications a safety resistor is added between the gate and source of each FET in the bridge. When a high-side FET is held in the on-state, the current through the associated high-side gate-source resistor ( provided by the high-side drive and GSH therefore appears as a static resistive load on the top-off charge pump ...
Page 9
... A3941 Table 1. Phase Control Truth Table Inputs PWMH PWML PHASE don’t care (same for input 1 or input 0 high-side FET active low-side FET active high impedance, both FETs off Table 2 ...
Page 10
... This is an active-low input, and when active it allows RESET Pin the A3941 to enter sleep mode. When RESET is held low, the regulator and all internal circuitry are disabled and the A3941 enters sleep mode. Before fully entering sleep mode, there is a short delay while the regulator decoupling and storage capacitors discharge ...
Page 11
... Before a high-side drive can be turned on, the voltage across the associated bootstrap capacitor must be higher than the turn-on voltage limit. If this is not the case, then the A3941 will Disable Fault ...
Page 12
... V completely disables the V monitor circuits, preventing detec- DS tion of short faults and any indication of short faults by the fault flags. In this condition the external FETs will not be protected by the A3941. When V is less than the disable threshold Short to Supply DSTH voltage, V ...
Page 13
... EMF of the load. In these cases, typically actuator posi- tioning or servo control systems, it may be necessary to use fast decay to provide continuous control over the load current. The A3941 can be configured to provide fast decay using either diode recirculation or synchronous rectification. Fast decay with diode recirculation is achieved by applying a PWM signal at the same time to both PWM inputs, PWMH and PWML, with SR disabled (figure 2A) ...
Page 14
... FETs are switched at the same time; for example, when using synchronous rectification or after a bootstrap capacitor charg- ing cycle. In the A3941, the dead time for both phases is set by a single dead-time resistor between the RDEAD and DEAD AGND pins ...
Page 15
... The DEAD The bootstrap capacitors, C ensure proper operation of the A3941. If the capacitances are too high, time will be wasted charging the capacitor, resulting in a limit on the maximum duty cycle and the PWM frequency. If the capacitances are too low, there can be a large voltage drop at the time the charge is transferred from C to charge sharing ...
Page 16
... the bootstrap capacitor volt- BOOTUV age drops below this threshold, the A3941 will turn on the neces- sary low-side FET, and continue charging until the bootstrap capacitor exceeds the undervoltage threshold plus the hysteresis ...
Page 17
... The following are recommendations regarding some of these consid- erations: • The A3941 ground, GND, and the high-current return of the external FETs should return separately to the negative side of the motor supply filtering capacitor. This will minimize the effect of switching noise on the device logic and analog reference ...
Page 18
... Gate drive outputs ESD 3 kΩ PWMx SR PHASE 8.5 V (E) Logic inputs, no pulldown Automotive Full Bridge MOSFET Driver Optional reverse battery protection VBB VDRAIN GHB VREG GHA A3941 GLA VDSTH GLB RDEAD LSS GND Optional components to limit LSS transients CP1 CP2 Cx GHx ...
Page 19
... A3941 Terminal List Number Name 1 VDRAIN High-side common drain 2 LSS Low-side common source 3 GLB Low-side gate drive Load connection B 5 GHB High-side gate drive Bootstrap capacitor B 7 VREG Regulated VREG Regulated Bootstrap capacitor A 10 GHA High-side gate drive A ...
Page 20
... A3941 Package LP 28-Pin TSSOP with Exposed Thermal Pad 9.70 ±0. 5.00 28X 0.10 C +0.05 0.25 0.65 –0.06 Copyright ©2008, Allegro MicroSystems, Inc. The products described here are manufactured under one or more U.S. patents or U.S. patents pending. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products ...