MCC141511A Motorola / Freescale Semiconductor, MCC141511A Datasheet - Page 9

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MCC141511A

Manufacturer Part Number
MCC141511A
Description
LCD Segment Driver
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
INTRODUCTION
plex ratios. The device consists of the following functional blocks as
shown in the Block Diagram.
generates internal signals for synchronisation.
RAM has one-to-one correspondence to a pixel of the LCD. The display
RAM is in vertical byte oriented format as shown in Figure 6 and the
way the display RAM is addressed depends on the multiplexing mode of
the LCD (Figure 8). With reference to Figure 6, the display RAM also
contains 16 bytes of memory which is in horizontal format ($280-$28F).
The display RAM is addressed when backplane reaches 41.
appropriate voltage levels from an external voltage divider. See figure 4.
LCD frontplane. See Figure 7.
The MC141511 is LCD driver with selectable 1: 32 or 1: 41 multi-
CONTROL LOGIC - accepts the control signals from the MCU and
DISPLAY RAM - stores the display data. Each bit of the display
LEVEL SELECTOR - consists of a switching circuit to select
SEGMENT DRIVERS - provides the segment driving signals to the
MOTOROLA
OPERATION OF LCD DRIVER
and frame frequency is 64 Hz for 1:32 multiplex and 50 Hz for 1:41
multiplex ratio. See Figure 5.
GENERATION OF LCD BIAS LEVELS
panels, the bias levels should be selected such that
The LCD driver clock is derived from the 2.048KHz BPCLK
Refer to Figure 4. In order to obtain optimum contrast for LCD
BIAS = R/(4R+R1) = 1/( MUX + 1)
V1/VLCD = 1/( MUX + 1)
V2/VLCD = 2/( MUX + 1)
V3/VLCD = ( MUX - 1)/( MUX + 1)
V4/VLCD = MUX /( MUX + 1)
Example: Mux = 41 ----- Bias = 1: 7.4,
R = 10K, R1 = 33K, VR = 100K
Mux = 32 ----- Bias = 1: 6.6,
R = 10K, R1 = 27K, VR = 100K
MC141511A
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