MSC8122MPLOX Freescale Semiconductor / Motorola, MSC8122MPLOX Datasheet - Page 40

• Manufacturer Part Number: MSC8122MPLOX
• Description: 8122-LO SPEED-LEAD-BUFF.
• Manufacturer: Freescale Semiconductor / Motorola

Hardware Design Considerations
After power-up,
3.2
When used as a drop-in replacement in MSC8102 applications or when implementing a new design, use the guidelines
described in Migrating Designs from the MSC8102 to the MSC8122 (AN2716) and the MSC8122 Design Checklist (AN3374
for optimal system performance. MSC8122 and MSC8126 Power Circuit Design Recommendations and Examples (AN2937)
provides detailed design information. See Section 2.5.2 for start-up timing specifications.
Figure 33 shows the recommended power decoupling circuit for the core power supply. The voltage regulator and the
decoupling capacitors should supply the required device current without any drop in voltage on the device pins. The voltage on
the package pins should not drop below the minimum specified voltage level even for a very short spikes. This can be achieved
by using the following guidelines:
Each
GND
chip. The
four sides of the package. The capacitor leads and associated printed circuit traces connecting to chip
be kept to less than half an inch per capacitor lead. A four-layer board is recommended, employing two inner layers as
GND
All output pins on the MSC8122 have fast rise and fall times. PCB trace interconnection length should be minimized to
minimize undershoot and reflections caused by these fast output switching times. This recommendation particularly applies to
the address and data buses. Maximum PCB trace lengths of six inches are recommended. For the DSI control signals in
synchronous mode, ensure that the layout supports the DSI AC timing requirements and minimizes any signal crosstalk.
Capacitance calculations should consider all device loads as well as parasitic capacitances due to the PCB traces. Attention to
proper PCB layout and bypassing becomes especially critical in systems with higher capacitive loads because these loads create
higher transient currents in the
Special care should be taken to minimize the noise levels on the PLL supply pins. There is one pair of PLL supply pins:
V
40
Voltage Regulator
CCSYN
Power supply
(I
min
•
•
•
•
V
pin should have a low-impedance path to the ground plane. The power supply pins drive distinct groups of logic on the
planes.
or
= 3 A)
CC
-
GND
Never allow V
Design the V
current. Such a design yields an initial V
For the core supply, use a voltage regulator rated at 1.2 V with nominal rating of at least 3 A. This rating does not
reflect actual average current draw, but is recommended because it resists changes imposed by transient spikes and has
better voltage recovery time than supplies with lower current ratings.
Decouple the supply using low-ESR capacitors mounted as close as possible to the socket. Figure 33 shows three
capacitors in parallel to reduce the resistance. Three capacitors is a recommended minimum number. If possible, mount
at least one of the capacitors directly below the MSC8122 device.
V
and
CC
Power Supply Design Considerations
SYN
V
power supply should have at least four 0.1 µF by-pass capacitors to ground located as closely as possible to the
DD
V
. To ensure internal clock stability, filter the power to the
DDH
pin on the MSC8122 device should have a low-impedance path to the board power supply. Similarly, each
+
-
1.2 V
DDH
must not exceed
DD
to exceed V
supply to prevent reverse current flow by adding a minimum 10 Ω resistor to GND to limit the
V
MSC8122 Quad Digital Signal Processor Data Sheet, Rev. 16
CC
,
V
DD
Note: Use at least three capacitors.
Each capacitor must be at least 150 μF.
Figure 33. Core Power Supply Decoupling
DDH
V
, and
DD
/
Maximum IR drop
of 15 mV at 1 A
+ 0.8V.
V
GND
CCSYN
Bulk/Tantalum capacitors
with low ESR and ESL
DDH
circuits. Pull up all unused inputs or signals that will be inputs during reset.
by more than 2.6 V.
level of V
DD
– 0.8 V before it is enabled.
V
CCSYN
L
max
= 2 cm
input with a circuit similar to the one in
High frequency capacitors
One 0.01 µF capacitor
for every 3 core supply
(very low ESR and ESL)
pads.
V
CC
Freescale Semiconductor
,
V
DD
, and
GND
MSC8122
V
CC
should
and