M25PE20 Numonyx, B.V., M25PE20 Datasheet - Page 38

• Manufacturer Part Number: M25PE20
• Description: 1 and 2 Mbit, page-erasable serial Flash memories with byte alterability, 75 MHz SPI bus, standard pinout
• Manufacturer: Numonyx, B.V.

Instructions
6.11
Note:
38/64
Write to Lock Register (WRLR)
The Write to Lock Register (WRLR) instruction is decoded only in the T9HX process (see
Important note on page
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the targeted
sector and one data byte on Serial Data input (D). The instruction sequence is shown in
Figure
latched in, otherwise the Write to Lock Register (WRLR) instruction is not executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than t
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 18. Write to Lock Register (WRLR) instruction sequence
Table 12.
All sectors
S
C
D
18. Chip Select (S) must be driven High after the eighth bit of the data byte has been
0
Sector
Lock Register In
1
2
Instruction
3
4
6).
5
6
b7-b2
7
Bit
b1
b0
MSB
23
8
22 21
9 10
Sector Lock Down bit value
Sector Write Lock bit value
24-bit address
3
28 29 30 31 32 33 34 35
2
1
0
MSB
7
SHSL
6
Value
Lock Register
5
‘0’
minimum value.
value
4
3
36 37 38
M25PE20, M25PE10
2
1
0
39
AI10784b