M25P80-VMP6TP Numonyx, B.V., M25P80-VMP6TP Datasheet - Page 19

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M25P80-VMP6TP

Manufacturer Part Number
M25P80-VMP6TP
Description
8 Mbit, low voltage, serial Flash memory with 75 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
M25P80
6.1
Table 4.
1. The RDID instruction is available only for parts made with Technology T9HX (0.11µm), identified with
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
FAST_READ
Instruction
RDID
Process letter '4'. (Details of how to find the Technology Process in the part marking are given in AN1995,
see also
WREN
WRSR
RDSR
READ
WRDI
RES
PP
SE
BE
DP
(1)
Section 12: Part
Instruction set
Write Enable
Write Disable
Read Identification
Read Status Register
Write Status Register
Read Data Bytes
Read Data Bytes at Higher
Speed
Page Program
Sector Erase
Bulk Erase
Deep Power-down
Release from Deep Power-
down, and Read Electronic
Signature
Release from Deep Power-
down
Description
numbering.)
(Figure
instruction code
1001 1111
0000 0001
0000 0110
0000 0100
0000 0101
0000 0011
0000 1011
0000 0010
1101 1000
1100 0111
1011 1001
1010 1011
7) sets the Write Enable Latch (WEL) bit.
One-byte
D8h
C7h
ABh
9Fh
0Bh
B9h
06h
04h
05h
01h
03h
02h
Address
bytes
0
0
0
0
0
3
3
3
3
0
0
0
0
Dummy
bytes
0
0
0
0
0
0
1
0
0
0
0
3
0
Instructions
1 to 256
1 to 20
bytes
1 to ∞
1 to ∞
1 to ∞
1 to ∞
Data
0
0
1
0
0
0
0
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