M25P16-VMP6TP Numonyx, B.V., M25P16-VMP6TP Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
M25P16-VMP6TP
Manufacturer Part Number
M25P16-VMP6TP
Description
16 Mbit, serial Flash memory, 75 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet
1.M25P16-VMP6TP.pdf
(55 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
M25P16
6.1
Table 4.
Write Enable (WREN)
The Write Enable (WREN) instruction
The Write Enable Latch (WEL) bit must be set prior to every Page Program (PP), Sector
Erase (SE), Bulk Erase (BE) and Write Status Register (WRSR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
Figure 8.
FAST_READ
Instruction
WREN
WRSR
RDSR
READ
WRDI
RDID
RES
DP
PP
SE
BE
Instruction set
Write Enable (WREN) instruction sequence
Write Enable
Write Disable
Read Identification
Read Status Register
Write Status Register
Read Data Bytes
Read Data Bytes at Higher
Speed
Page Program
Sector Erase
Bulk Erase
Deep Power-down
Release from Deep
Power-down, and Read
Electronic Signature
Release from Deep
Power-down
S
C
D
Q
Description
High Impedance
0
(Figure
1
One-byte instruction
2
0000 0110
0000 0100
1001 1111
0000 0101
0000 0001
0000 0011
0000 1011
0000 0010
1101 1000
1100 0111
1011 1001
1010 1011
Instruction
3
8) sets the Write Enable Latch (WEL) bit.
4
code
5
6
7
D8h
C7h
ABh
9Fh
01h
0Bh
B9h
06h
04h
05h
03h
02h
Address
bytes
AI02281E
0
0
0
0
0
3
3
3
3
0
0
0
0
Dummy
bytes
0
0
0
0
0
0
1
0
0
0
0
3
0
Instructions
1 to 256
1 to 20
bytes
1 to ∞
1 to ∞
1 to ∞
1 to ∞
Data
0
0
1
0
0
0
0
19/55