M25P10-A Numonyx, B.V., M25P10-A Datasheet - Page 49

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M25P10-A

Manufacturer Part Number
M25P10-A
Description
1 Mbit, serial Flash memory, 50 MHz SPI bus interface
Manufacturer
Numonyx, B.V.
Datasheet

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M25P10-A
13
Revision history
Table 25.
25-Feb-2001
12-Sep-2002
13-Dec-2002
21-Feb-2003
24-Nov-2003
08-Mar-2005
01-Aug-2005
01-Apr-2005
14-Apr-2006
Date
Document revision history
Revision
1.0
1.1
1.2
1.3
2.0
3.0
4.0
5.0
6
Document written.
VFQFPN8 package (MLP8) added. Clarification of descriptions of
entering Standby Power mode from Deep Power-down mode, and of
terminating an instruction sequence or data-out sequence.
Typical Page Program time improved. Write Protect setup and hold times
specified, for applications that switch Write Protect to exit the Hardware
Protection mode immediately before a WRSR, and to enter the Hardware
Protection mode again immediately after.
Erroneous address ranges corrected in memory organization table.
Table of contents, warning about exposed paddle on MLP8, and Pb-free
options added.
40 MHz AC characteristics table included as well as 25 MHz. I
t
package.
Devices with Process technology Code X added
(RDID)
6)) added.
SO8 narrow package specifications updated.
Notes 1 and 2 removed from
Note 1 to
and T
Small text changes. End timing line of t
timing.
Read Identification
Deep Power-down and Read Electronic Signature (RES)
and
paragraph clarified.
Updated Page Program (PP) instructions in
Program (PP)
All packages are ECOPACK® compliant. Grade 3 information added (see
Table
Figure 3: Bus master and memory devices on the SPI bus
Note 2 added.
Table 11: Data retention and endurance
40MHz frequency condition modified for I
characteristics (device grade
Table 14: DC characteristics (device grade 6)
MLP package renamed as VFQFPN and specifications updated (see
silhouette on first page,
Figure 26
grade 3 added to
/X
SE
Process
(typ) and t
Active Power, Standby Power and Deep Power-down modes
LEAD
10,
and
Table
Table 9: Absolute maximum ratings
and
values removed.
added to
Table 20: AC characteristics (50 MHz operation, device grade
BE
and
Note 2
(typ) values improved. Change of naming for VDFPN8
11,
Table 8: Power-up timing and VWI
Table 16: Instruction times (device grade
(RDID),
Table
Table 24: Ordering information
added below
Figure 27
15,
Deep Power-down (DP)
Table 24: Ordering information
Table
6).
Changes
and
17,
Figure
SHQZ
Table
Table 18
added.
CC3
27. V
modified in
Page
22).
in
changed, note 2 removed
shows preliminary data.
WI
Table 14: DC
and
(Read Identification
Note 2
Programming,
parameter for device
and
scheme.
threshold.
Table
Revision history
Figure 25: Output
added below
Release from
instructions,
24).
modified and
6).
scheme.
CC3
Page
(max),
49/51

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