74ABT827D,623 NXP Semiconductors, 74ABT827D,623 Datasheet - Page 7

• Manufacturer Part Number: 74ABT827D,623
• Description: IC BUFF DVR TRI-ST 10BIT 24SOICW
• Manufacturer: NXP Semiconductors
• Series: 74ABTr

Specifications of 74ABT827D,623

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 10
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Logic Family: ABT
• Number Of Channels Per Chip: 10
• Polarity: Non-Inverting
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 32 mA
• Low Level Output Current: 64 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 10 / 10
• Output Type: 3-State
• Propagation Delay Time: 4.4 ns at 5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74ABT827D-T; 74ABT827D-T; 935055340623

NXP Semiconductors
Table 8.
74ABT827_4
Product data sheet
Input
V
3.0 V
Fig 6.
Fig 7.
I
negative
positive
pulse
pulse
a. Input pulse definition
0 V
0 V
V
V
I
I
V
V
Test data and V
R
C
R
V
3-state enable and disable times
Test circuit for measuring switching times
M
OL
L
L
T
EXT
Test data
90 %
10 %
= Load resistance.
= Load capacitance including jig and probe capacitance.
= Termination resistance should be equal to output impedance Z
= 1.5 V
f
1 MHz
and V
I
= Test voltage for switching times.
OH
t
t
f
r
V
V
are typical voltage output levels that occur with the output load.
M
M
10 %
90 %
EXT
levels are given in
HIGH-to-OFF
OFF-to-HIGH
t
500 ns
OFF-to-LOW
LOW-to-OFF
W
OEn input
output
output
t
t
W
W
3.5 V
GND
GND
V
10 %
V
90 %
OH
OL
t
≤ 2.5 ns
V
All information provided in this document is subject to legal disclaimers.
r
I
, t
V
V
Table
M
M
f
t
t
r
f
8.
V
001aai298
90 %
10 %
Rev. 04 — 1 April 2010
M
enabled
outputs
t
PLZ
t
PHZ
Load
C
50 pF
L
V
OL
V
OH
+ 0.3 V
− 0.3 V
b. Test circuit
R
500 Ω
10-bit buffer/line driver; non-inverting; 3-state
o
L
disabled
outputs
of the pulse generator.
G
t
V
PZL
t
PZH
I
V
t
open
PHL
EXT
V
R T
M
V
, t
M
001aal293
DUT
V
PLH
outputs
enabled
CC
t
open
V
PZH
O
74ABT827
, t
PHZ
© NXP B.V. 2010. All rights reserved.
C L
V
mna616
EXT
t
7.0 V
R L
R L
PZL
, t
PLZ
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