74ALVC245PW,118 NXP Semiconductors, 74ALVC245PW,118 Datasheet - Page 3
![IC TRANSCVR TRI-ST 8BIT 20TSSOP](/photos/6/52/65219/568-20-tssop_sot360-1_sml.jpg)
74ALVC245PW,118
Manufacturer Part Number
74ALVC245PW,118
Description
IC TRANSCVR TRI-ST 8BIT 20TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVCr
Datasheet
1.74ALVC245D112.pdf
(14 pages)
Specifications of 74ALVC245PW,118
Logic Type
Transceiver, Non-Inverting
Package / Case
20-TSSOP
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.65 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Logic Family
ALVC
Number Of Channels Per Chip
8
Input Level
LVTTL
Output Level
LVTTL
Output Type
3-State
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 85 C
Function
Bus Transceiver
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Number Of Circuits
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVC245PWDH-T
74ALVC245PWDH-T
935269726118
74ALVC245PWDH-T
935269726118
NXP Semiconductors
5. Pinning information
Table 2.
6. Functional description
Table 3.
[1]
74ALVC245_2
Product data sheet
Symbol
DIR
A[0:7]
B[0:7]
GND
OE
V
Input
OE
L
L
H
Fig 3. Pin configuration SO20, TSSOP20
CC
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Pin description
Function table
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
18, 17, 16, 15, 14, 13, 12,
11
10
19
20
10
1
2
3
4
5
6
7
8
9
5.1 Pinning
5.2 Pin description
[1]
245
DIR
L
H
X
001aac431
Description
direction control
data input/output
data input/output
ground (0 V)
output enable input (active LOW)
supply voltage
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
Rev. 02 — 7 January 2008
Input/output
An
A = B
input
Z
Fig 4. Pin configuration DHVQFN20
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
index area
terminal 1
A0
A1
A2
A3
A4
A5
A6
A7
Transparent top view
2
3
4
5
6
7
8
9
Octal bus transceiver; 3-state
GND
245
Bn
input
B = A
Z
(1)
74ALVC245
19
18
17
16
15
14
13
12
001aac432
© NXP B.V. 2008. All rights reserved.
OE
B0
B1
B2
B3
B4
B5
B6
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