74ALVC125PW,112 NXP Semiconductors, 74ALVC125PW,112 Datasheet - Page 2

• Manufacturer Part Number: 74ALVC125PW,112
• Description: IC BUFF DVR TRI-ST QD 14TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74ALVCr

Specifications of 74ALVC125PW,112

• Package / Case: 14-TSSOP
• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 4
• Number Of Bits Per Element: 1
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 1.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Logic Family: 74ALVC
• Number Of Channels Per Chip: 4
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 24 mA
• Input Bias Current (max): 10 uA
• Low Level Output Current: 24 mA
• Minimum Operating Temperature: - 40 C
• Output Type: 3-State
• Propagation Delay Time: 1.8 ns
• Number Of Lines (input / Output): 4 / 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ALVC125PW; 74ALVC125PW; 935269719112

NXP Semiconductors
4. Functional diagram
5. Pinning information
74ALVC125_2
Product data sheet
Fig 1. Logic symbol
Fig 3. Logic diagram (one buffer)
Fig 4. Pin configuration SO14 and TSSOP14
GND
1OE
2OE
1A
1Y
2A
2Y
5.1 Pinning
1
2
3
4
5
6
7
10
12
13
2
1
5
4
9
74ALVC125
1A
1OE
2A
2OE
3A
3OE
4A
4OE
mna228
001aah089
1Y
2Y
3Y
4Y
11
3
6
8
14
13
12
11
10
9
8
nOE
V
4OE
4A
4Y
3OE
3A
3Y
nA
CC
Rev. 02 — 10 January 2008
Fig 2. IEC logic symbol
Fig 5. Pin configuration DHVQFN14
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
mna227
index area
terminal 1
nY
2OE
1A
1Y
2A
2Y
10
13
12
2
1
5
4
9
Transparent top view
2
3
4
5
6
Quad buffer/line driver; 3-state
74ALVC125
EN1
GND
mna229
1
(1)
74ALVC125
13
12
11
10
11
9
3
6
8
001aah090
© NXP B.V. 2008. All rights reserved.
4OE
4A
4Y
3OE
3A
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