MC74LCX16245DTG ON Semiconductor, MC74LCX16245DTG Datasheet - Page 2

• Manufacturer Part Number: MC74LCX16245DTG
• Description: IC TXRX 16BIT NONINV LV 48-TSSOP
• Manufacturer: ON Semiconductor
• Series: 74LCXr

Specifications of MC74LCX16245DTG

• Logic Type: Transceiver, Non-Inverting
• Number Of Elements: 2
• Number Of Bits Per Element: 8
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TSSOP
• Logic Family: LCX
• Operating Supply Voltage (typ): 2.5/3.3V
• Propagation Delay Time: 8.5ns
• Number Of Elements: 2
• Number Of Channels: 16
• Input Logic Level: LVTTL/TTL
• Output Logic Level: LVCMOS
• Output Type: 3-State
• Package Type: TSSOP
• Polarity: Non-Inverting
• Logical Function: Bus Transceiver
• Operating Supply Voltage (min): 2V
• Operating Supply Voltage (max): 3.6V
• Technology: CMOS
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Logic Device Type: Transceiver, Non Inverting
• Supply Voltage Range: 2V To 3.6V
• Logic Case Style: TSSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Family Type: LCX
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC74LCX16245DTG; MC74LCX16245DTGOS

H
L
Z
X
TRUTH TABLE
OE1
H
L
L
= High Voltage Level
= Low Voltage Level
= High Impedance State
= High or Low Voltage Level and Transitions Are Acceptable; for I
Inputs
Figure 1. Pinout: 48−Lead (Top View)
T/R1
T/R1
GND
GND
GND
GND
T/R2
H
X
L
V
V
B10
B11
B12
B13
B14
B15
B0
B1
B2
B3
CC
B4
B5
B6
B7
B8
B9
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
Bus B0:7 Data to Bus A0:7
Bus A0:7 Data to Bus B0:7
High Z State on A0:7, B0:7
Outputs
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
OE1
A0
A1
GND
A2
A3
V
A4
A5
GND
A6
A7
A8
A9
GND
A10
A11
V
A12
A13
GND
A14
A15
OE2
CC
CC
MC74LCX16245
http://onsemi.com
2
CC
OE2
T/R1
Table 1. PIN NAMES
OEn
T/Rn
A0 − A15
B0 − B15
H
reasons, DO NOT FLOAT Inputs
L
L
OE1
A0:7
Inputs
1
48
Pins
T/R2
H
L
X
Figure 2. Logic Diagram
Output Enable Inputs
Transmit/Receive Inputs
Side A Inputs or 3−State Outputs
Side B Inputs or 3−State Outputs
B0:7
Bus B8:15 Data to Bus A8:15
Bus A8:15 Data to Bus B8:15
High Z State on A8:15, B8:15
T/R2
Outputs
A8:15
Function
24
OE2
25
One of Eight
B8:15