74LCX541MTCX Fairchild Semiconductor, 74LCX541MTCX Datasheet - Page 6

• Manufacturer Part Number: 74LCX541MTCX
• Description: IC BUFF/DVR 8BIT LOW V 20TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74LCXr

Specifications of 74LCX541MTCX

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 1
• Number Of Bits Per Element: 8
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Logic Family: 74LCX
• Number Of Channels Per Chip: Octal
• Polarity: Non-Inverting
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2 V
• Maximum Operating Temperature: 85 C
• Mounting Style: SMD/SMT
• High Level Output Current: - 24 mA
• Input Bias Current (max): 10 uA
• Low Level Output Current: 24 mA
• Minimum Operating Temperature: - 40 C
• Number Of Lines (input / Output): 8
• Output Type: 3-State
• Propagation Delay Time: 7.5 ns @ 2.7 V or 6.5 ns @ 3.3 V
• Logical Function: Buffer/Line Driver
• Number Of Elements: 1
• Number Of Channels: 8
• Number Of Inputs: 8
• Number Of Outputs: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Package Type: TSSOP
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2V
• Quiescent Current: 10uA
• Technology: CMOS
• Pin Count: 20
• Mounting: Surface Mount
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Dc: 1007
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LCX541MTCXTR

©2006 Fairchild Semiconductor Corporation
74LCX541 Rev. 1.6.0
AC Loading and Waveforms
CONTROL
CONTROL
OUTPUT
OUTPUT
Propagation Delay, Pulse Width and
DATA
DATA
OUT
CLOCK
3-STATE Output Low Enable and
DATA
IN
OUT
Waveform for Inverting and
IN
Non-Inverting Functions
Disable Times for Logic
t
PZH
t
rec
t
pxx
Figure 2. Waveforms (Input Characteristics; f = 1MHz, t
t
Symbol
PHL
Waveforms
Figure 1. AC Test Circuit (C
SIGNAL
V
V
V
V
V
TEST
mo
mo
V
mi
t
x
y
W
mo
t
PHZ
t
pxx
t
V
rec
t
t
V
V
t
V
DUT
PZH
mi
PLH
PZL
V
mi
3.3V ± 0.3V
CC
mi
V
Test
V
mo
(Generic for LCX Family)
V
OH
OL
t
, t
, t
, t
mi
PLH
V
V
GND
1.5V
1.5V
mo
PHL
PLZ
PHZ
CC
V
V
+ 0.3V
– 0.3V
V
GND
V
GND
OH
Y
CC
CC
C
L
V
L
CC
6V at V
includes probe and jig capacitance)
500
x 2 at V
6
500
V
V
OH
OL
Switch
CC
2.7V
Open
1.5V
1.5V
GND
V
CC
+ 0.3V
– 0.3V
CC
OUTPUT
3.3 ± 0.3V
CONTROL
ANY
CONTROL
2.5 ± 0.2V
OUTPUT
CLEAR
3-STATE Output High Enable and
INPUT
OPEN
GND
V
I
DATA
DATA
OUT
MR
OR
Setup Time, Hold Time and
IN
Recovery Time for Logic
Disable Times for Logic
2.5V ± 0.2V
V
V
t
r
10%
OH
OL
t
PZL
r
V
V
90%
t
= t
t
t
t
CC
CC
rise
+ 0.15V
– 0.15V
PLH
PZH
PZL
f
/ 2
/ 2
, t
, t
, t
t
= 3ns)
and t
S
PLZ
V
PHI
PHZ
90%
mo
t
S
10%
t
rec
V
fall
mi
t
PLZ
t
f
t
V
H
mi
V
mi
V
mi
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V
V
V
GND
V
GND
V
GND
X
OL
CC
CC
CC
V
V
OH
OL