MC9S12H256 Freescale Semiconductor, Inc, MC9S12H256 Datasheet
MC9S12H256
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MC9S12H256 Summary of contents
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... Motorola was negligent regarding the design or manufacture of the part. For More Information On This Product, MC9S12H256 V01.18 Revised: 13 AUG 2003 Motorola, Inc Go to: www ...
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... Freescale Semiconductor, Inc. Revision History Version Revision Effective Number Date Date 07 MAR 03 APR V01.00 2001 2001 10 MAI 10 MAY V01.01 2001 2001 14 MAY 14 MAY V01.02 2001 2001 30 MAY 30 MAY V01.03 2001 2001 11 JUN 11 JUN V01.04 2001 2001 18 JUN 18 JUN V01.05 2001 2001 ...
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... AUG 13 AUG V01.18 2004 2004 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Author Description of Changes - Replaced references w.r.t. new family name HCS12. - Corrected XCLKS reference in CRG electrical spec. - added ‘powered by’ column in pin list table - new document numbering ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 4 For More Information On This Product, Go to: www.freescale.com ...
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... PE0 / XIRQ — Port E Input Pin 2.3.18 PH[7:0] / KWH[7:0] — Port H I/O Pins [7:0 2.3.19 PJ[3:0] / KWJ[3:0] — Port J I/O Pins [3:0 2.3.20 PK7 / FP23 / ECS / ROMONE — Port K I/O Pin 2.3.21 PK[3:0] / BP[3:0] / XADDR[17:14] — Port K I/O Pins [3: 2.3.22 PL[7:4] / FP[31:28] — Port L I/O Pins [7:4 2.3.23 PL[3:0] / FP[19:16] — Port L I/O Pins [3:0 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 5 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 2.3.24 PM5 / TXCAN1 — Port M I/O Pin 2.3.25 PM4 / RXCAN1 — Port M I/O Pin 2.3.26 PM3 / TXCAN0 — Port M I/O Pin 2.3.27 PM2 / RXCAN0 — Port M I/O Pin 2.3.28 PM1 / SCL — Port M I/O Pin 2.3.29 PM0 / SDA — Port M I/O Pin 2.3.30 PP[5:2] / PWM[5:2] — ...
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... Section 8 Timer (TIM) Block Description Section 9 Analog to Digital Converter (ATD) Block Description Section 10 Inter-IC Bus (IIC) Block Description Section 11 Serial Communications Interface (SCI) Block Description Section 12 Serial Peripheral Interface (SPI) Block Description For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 7 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Section 13 Pulse Width Modulator (PWM) Block Description Section 14 Flash EEPROM 256K Block Description Section 15 EEPROM 4K Block Description Section 16 RAM Block Description Section 17 Liquid Crystal Display Driver (LCD) Block Description Section 18 MSCAN Block Description ...
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... Master Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 A.6.2 Slave Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 A.7 LCD_32F4B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 A.8 External Bus Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 A.8.1 General Muxed Bus Timing 121 Appendix B Package Information B.1 General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125 B.2 112-pin LQFP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 B.3 144-pin LQFP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 9 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 10 For More Information On This Product, Go to: www.freescale.com ...
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... MC9S12H128 Block Diagram Figure 1-3 MC9S12H256 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 1-4 MC9S12H128 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 2-1 Pin Assignments in 112-pin LQFP for MC9S12H256 and MC9S12H128 . . . . . . . . . . 56 Figure 2-2 Pin Assignments in 144-pin LQFP for MC9S12H256 . . . . . . . . . . . . . . . . . . . . . . . . . 57 Figure 3-1 Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69 Figure 21-1 LQFP112 recommended PCB layout Figure 21-2 LQFP144 recommended PCB layout Figure A-1 ATD Accuracy Definitions ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 12 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Table 0-1 Document References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 1-1 Device Memory Map MC9S12H256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 1-2 Device Memory Map MC9S12H128 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Table 1-3 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Table 1-4 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Table 1-5 Assigned Part ID Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 1-6 Memory size registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 2-1 Signal Properties ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 14 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Preface The Device User Guide provides information about the MC9S12H256 and MC9S12H128 device made up of standard HCS12 blocks and the HCS12 processor core. This document is part of the customer documentation. A complete set of device manuals also includes the HCS12 Core User Guide and all the individual Block User Guides of the implemented modules effort to reduce redundancy all module specific information is located only in the respective Block User Guide ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 16 For More Information On This Product, Go to: www.freescale.com ...
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... HCS12 Core. The MC9S12H256 has full 16-bit data paths throughout. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. In addition to the I/O ports available in each module, 12 general purpose I/O pins are available with interrupt and wake-up capability from STOP or WAIT mode ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 – BDM (Background Debug Mode) • CRG (low current oscillator, PLL, reset, clocks, COP watchdog, real time interrupt, clock monitor) • 8-bit and 4-bit ports with interrupt functionality – Digital filtering – Programmable rising or falling edge trigger • ...
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... Special Operating Modes – Special Single-Chip Mode with active Background Debug Mode – Special Test Mode (Motorola Use Only) – Special Peripheral Mode (Motorola Use Only) Low power modes For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 19 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 • Stop Mode • Pseudo Stop Mode • Wait Mode 1.4 Block Diagram Figure 1 block diagram of the MC9S12H256 device. 20 For More Information On This Product, Go to: www.freescale.com ...
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... PH7 KWH7 PJ0 KWJ0 PJ1 KWJ1 PJ2 KWJ2 PJ3 KWJ3 Figure 1-1 MC9S12H256 Block Diagram For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Voltage Regulator Analog to Digital Converter (ATD) CPU12 Periodic Interrupt COP Watchdog Clock Monitor Breakpoints Integration Module ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Figure 1 block diagram of the MC9S12H128 device. 22 For More Information On This Product, Go to: www.freescale.com ...
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... PT4 IOC4 IOC5 packages! PT5 PT6 IOC6 PT7 IOC7 Figure 1-2 MC9S12H128 Block Diagram For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Voltage Regulator Analog to Digital Converter (ATD) CPU12 Periodic Interrupt COP Watchdog Clock Monitor Breakpoints Integration ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 1.5 Device Memory Map 24 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com MC9S12H256 Device User Guide — V01.18 25 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Table 1-1 and Figure 1-3 show the device memory map of the MC9S12H256. Table 1-1 Device Memory Map MC9S12H256 Address $0000 – $0017 $0018 – $0019 $001A – $001B $001C – $001F $0020 – $0027 $0028 – $002F $0030 – ...
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... For More Information On This Product, MC9S12H256 Device User Guide — V01.18 $0000 $03FF $0000 $0FFF $1000 $3FFF $4000 $7FFF ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Table 1-2 Device Memory Map MC9S12H128 Address $00C8 – $00CF $00D0 – $00D7 $00D8 – $00DF $00E0 – $00FF $0100 – $010F $0110 – $011B $011C – $011F $0120 – $0137 $0140 – $017F $0180 – ...
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... VECTORS VECTORS $FFFF NORMAL EXPANDED* SINGLE CHIP Figure 1-4 MC9S12H128 Memory Map For More Information On This Product, MC9S12H256 Device User Guide — V01.18 $0000 1K Register Space $03FF Mappable to any 2K Boundary $0000 2K Bytes EEPROM initially overlapped by register space $07FF Mappable to any 4K Boundary ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 1.5.1 Detailed Register Map $0000 - $000F Address Name Read: $0000 PORTA Write: Read: $0001 PORTB Write: Read: $0002 DDRA Write: Read: $0003 DDRB Write: Read: $0004 Reserved Write: Read: $0005 Reserved Write: Read: ...
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... IRQE Write: $001F - $001F INT map (Core User Guide) Address Name Bit 7 Read: $001F HPRIO PSEL7 Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit WRINT ADR3 INTC INTA INT8 INT6 Bit 6 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0020 - $0027 Address Name Read: $0020 - Reserved $0027 Write: $0028 - $002F Address Name Read: $0028 BKPCT0 Write: Read: $0029 BKPCT1 Write: Read: $002A BKP0X Write: Read: $002B BKP0H Write: Read: $002C BKP0L ...
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... Write: Read: $0047 TTOV TOV7 Write: Read: $0048 TCTL1 OM7 Write: Read: $0049 TCTL2 OM3 Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 0 SYN5 SYN4 SYN3 REFDV3 REFDV2 REFDV1 REFDV0 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0040 - $006F Address Name Read: $004A TCTL3 Write: Read: $004B TCTL4 Write: Read: $004C TIE Write: Read: $004D TSCR2 Write: Read: $004E TFLG1 Write: Read: $004F TFLG2 Write: Read: $0050 TC0 (hi) ...
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... ADPU Write: Read: 0 $0083 ATDCTL3 Write: Read: $0084 ATDCTL4 SRES8 Write: Read: $0085 ATDCTL5 DJM Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit Bit 6 Bit 5 Bit 4 Bit Bit 6 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0080 - $00AF Address Name Read: $0086 ATDSTAT0 Write: Read: $0087 Reserved Write: Read: $0088 ATDTEST0 Write: Read: $0089 ATDTEST1 Write: Read: CCF15 $008A ATDSTAT2 Write: Read: $008B ATDSTAT1 Write: Read: $008C ATDDIEN0 ...
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... Write: $00C0 - $00C7 IIC (Inter IC Bus) Address Name Bit 7 Read: $00C0 IBAD ADR7 Write: Read: $00E1 IBFD IBC7 Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit ...
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... TCIE RIE ILIE TDRE TC RDRF IDLE SCI1 (Asynchronous Serial Interface) only on MC9S12H256 Bit 7 Bit 6 Bit 5 Bit SBR12 SBR7 SBR6 SBR5 SBR4 LOOPS SCISWAI RSRC M TIE TCIE RIE ILIE TDRE TC RDRF IDLE Go to: www ...
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... Freescale Semiconductor, Inc. $00D0 - $00D7 SCI1 (Asynchronous Serial Interface) only on MC9S12H256 Address Name Bit 7 Read: 0 $00D5 SCI1SR2 Write: Read: R8 $00D6 SCI1DRH Write: Read: R7 $00D7 SCI1DRL Write: T7 $00D8 - $00DF SPI0 (Serial Peripheral Interface) Address Name Bit 7 Read: $00D8 SPI0CR1 SPIE Write: Read: ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $00E0 - $00FF Address Name Read: $00E9 PWMSCLB Write: Read: PWMSCNTA $00EA Test Only Write: Read: PWMSCNTB $00EB Test Only Write: Read: $00EC PWMCNT0 Write: Read: $00ED PWMCNT1 Write: Read: $00EE PWMCNT2 Write: ...
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... Read: 0 $0116 ECMD Write: Read: 0 Reserved for $0117 Factory Test Write: Read: 0 $0118 EADDRHI Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 PRDIV8 FDIV5 FDIV4 FDIV3 NV6 NV5 NV4 NV3 0 0 WRALL 0 CCIE ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0110 - $011B Address Name Read: $0119 EADDRLO Write: Read: $011A EDATAHI Write: Read: $011B EDATALO Write: $011C - $011F Address Name $011C - Read: Reserved $011F Write: $0120 - $0137 Address Name Read: $0120 LCDCR0 ...
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... Reserved Write: Read: 0 $014D Reserved Write: Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0 $014E CAN0RXERR Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 Bit 6 Bit 5 Bit 4 Bit 3 RXACT SYNCH CSWAI TIME ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0140 - $017F Address Name Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0 $014F CAN0TXERR Write: Read: $0150 - CAN0IDAR0 - $0153 CAN0IDAR3 Write: Read: $0154 - CAN0IDMR0 - $0157 CAN0IDMR3 Write: $0158 - CAN0IDAR4 - Read: $015B ...
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... Write: Read: 0 $018B CAN1IDAC Write: Read: 0 $018C Reserved Write: Read: 0 $018D Reserved Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 ID13 ID12 ID11 ID10 ID5 ID4 ID3 ID2 DB6 DB5 DB4 DB3 DLC3 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0180 - $01BF Address Name Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0 $018E CAN1RXERR Write: Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0 $018F CAN1TXERR Write: Read: $0190 - CAN1IDAR0 - $0193 ...
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... Write: Read: 0 $01C9 Reserved Write: Read: 0 $01CA Reserved Write: Read: 0 $01CB Reserved Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 ID19 ID18 SRR=1 IDE=1 ID1 ID0 RTR IDE=0 ID13 ID12 ID11 ID10 ID5 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $01C0 - $01FF Address Name Read: $01CC Reserved Write: Read: $01CD Reserved Write: Read: $01CE Reserved Write: Read: $01CF Reserved Write: Read: $01D0 MCCC0 Write: Read: $01D1 MCCC1 Write: Read: $01D2 MCCC2 Write: ...
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... Write: Read: 0 $01F9 Reserved Write: Read: 0 $01FA Reserved Write: Read: 0 $01FB Reserved Write: Read: 0 $01FC Reserved Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $01C0 - $01FF Address Name Read: $01FD Reserved Write: Read: $01FE Reserved Write: Read: $01FF Reserved Write: $0200 - $027F Address Name Read: $0200 PTT Write: Read: $0201 PTIT Write: Read: $0202 DDRT Write: ...
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... PTJ Write: Read: 0 $0229 PTIJ Write: Read: 0 $022A DDRJ Write: Read: 0 $022B RDRJ Write: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Bit 6 Bit 5 Bit 4 Bit 3 0 RDRM5 RDRM4 RDRM3 0 PERM5 PERM4 PERM3 0 PPSM5 PPSM4 PPSM3 0 WOMM5 WOMM4 WOMM3 WOMM2 WOMM1 WOMM0 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 $0200 - $027F Address Name Read: $022C PERJ Write: Read: $022D PPSJ Write: Read: $022E PIEJ Write: Read: $022F PIFJ Write: Read: $0230 PTL Write: Read: $0231 PTIL Write: Read: $0232 DDRL Write: ...
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... The read-only value is a unique part ID for each revision of the chip. Table 1-5 shows the assigned part ID numbers. Table 1-5 Assigned Part ID Numbers Device MC9S12H256 MC9S12H256 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 PIM (Port Integration Module) Bit 7 Bit 6 Bit 5 Bit 4 PPSV7 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 NOTES: 1. The coding is as follows: Bit 15-12: Major family identifier Bit 11-8: Minor family identifier Bit 7-4: Major mask set revision number including FAB transfers Bit 3-0: Minor - non full - mask set revision The device memory sizes are located in two 8-bit registers MEMSIZ0 and MEMSIZ1 (addresses $001C and $001D after reset) ...
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... User Guides of the individual IP blocks on the device. 2.1 Device Pinout The MC9S12H256 is available in a 112-pin and 144-pin quad flat pack (LQFP), the MC9S12H128 is available in a 112-pin quad flat pack (LQFP). Most pins perform two or more functions, as described in the Signal Descriptions. Figure 2-1 and Figure 2-2 show the pin assignments. ...
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... M3C0M/PV4 17 M3C0P/PV5 18 M3C1M/PV6 19 M3C1P/PV7 20 M4C0M/PW0 21 M4C0P/PW1 22 M4C1M/PW2 23 M4C1P/PW3 24 VDDM3 25 VSSM3 26 M5C0M/PW4 27 M5C0P/PW5 28 Figure 2-1 Pin Assignments in 112-pin LQFP for MC9S12H256 and MC9S12H128 56 For More Information On This Product, MC9S12H-Family 112 LQFP Go to: www.freescale.com 84 PB5/ADDR5/DATA5/FP5 83 PB4/ADDR4/DATA4/FP4 82 PB3/ADDR3/DATA3/FP3 81 PB2/ADDR2/DATA2/FP2 80 PB1/ADDR1/DATA1/FP1 79 PB0/ADDR0/DATA0/FP0 78 PK0/XADDR14/BP0 77 PK1/XADDR15/BP1 76 PK2/XADDR16/BP2 75 PK3/XADDR17/BP3 ...
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... Pins shown in BOLD are not available in the 112 LQFP package VDDM3 33 VSSM3 34 M5C0M/PW4 35 M5C0P/PW5 36 Figure 2-2 Pin Assignments in 144-pin LQFP for MC9S12H256 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 MC9S12H-Family 144 LQFP Go to: www.freescale.com 108 PB5/ADDR5/DATA5/FP5 107 PB4/ADDR4/DATA4/FP4 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 2.2 Signal Properties Summary Table 2-1 summarizes all pin functions. NOTE: Bold entries determine pins not available on 112-pin LQFP. Pin Name Pin Name Pin Name Function 1 Function 2 Function 3 EXTAL — — XTAL — — ...
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... M3C0M M3C0P PV[7:4] — M3C1M M3C1P M4C0M M4C0P PW[3:0] — M4C1M M4C1P M5C0M M5C0P, PW[7:4] — M5C1M M5C1P MC9S12H256 Device User Guide — V01.18 Internal Pull Resistor Pin Name Powered Function 4 by CTRL — VDDX2 — VDDX2 — VDDX2 PERM/ PPSM — VDDX2 — ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL — Oscillator Pins EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived from the EXTAL input frequency. XTAL is the crystal output. ...
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... LCD module. In MCU expanded modes of operation, LSTRB is used for the low-byte strobe function to indicate the type of bus access and when instruction tagging is on, TAGLO is used to tag the low half of the instruction word being read into the instruction queue. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 61 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 2.3.15 PE2 / FP20 / R/W — Port E I/O Pin 2 PE2 is a general purpose input or output pin. It can be configured as frontplane segment driver output FP20 of the LCD module. In MCU expanded modes of operations, this pin performs the read/write output signal for the external bus. It indicates the direction of data on the external bus. 2.3.16 PE1 / IRQ — ...
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... PM0 is a general purpose input or output pin. It can be configured as the serial data pin SDA of the Inter-IC Bus Interface (IIC). NOTE: This pin is not available in the 112-pin LQFP version. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 63 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 2.3.30 PP[5:2] / PWM[5:2] — Port P I/O Pins [5:2] PP5-PP2 are general purpose input or output pins. They can be configured as Pulse Width Modulator (PWM) channel outputs PWM5-PWM2. NOTE: These pins are not available in the 112-pin LQFP version. 2.3.31 PP[1:0] / PWM[1:0] — Port P I/O Pins [1:0] PP1-PP0 are general purpose input or output pins ...
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... M3C0M results in a positive current flow through coil 0 when M3C0P is driven to a logic high state. PWM output on M3C1M results in a positive current flow through coil 1 when M3C1P is driven to a logic high state. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 65 ...
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... M4C0M results in a positive current flow through coil 0 when M4C0P is driven to a logic high state. PWM output on M4C1M results in a positive current flow through coil 1 when M4C1P is driven to a logic high state. 2.4 Power Supply Pins MC9S12H256 power and ground pins are described below. NOTE: All VSS pins must be connected together in the application (21.2 Recommended PCB layout). ...
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... VDDPLL, VSSPLL — Power Supply Pins for PLL VDDPLL and VSSPLL are the PLL supply pins and serve as connection points for external loop filter components. NOTE: No load allowed except for bypass capacitors. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 67 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 68 For More Information On This Product, Go to: www.freescale.com ...
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... Consult the CRG Block User Guide for details on clock generation. EXTAL bus clock CRG oscillator clock XTAL For More Information On This Product, MC9S12H256 Device User Guide — V01.18 S12_CORE core clock SCI0, SCI1 CAN0, CAN1 Figure 3-1 Clock Connections Go to: www.freescale.com Flash ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 70 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Section 4 Modes of Operation 4.1 Overview Eight possible modes determine the operating configuration of the MC9S12H256. Each mode has an associated default memory map and external bus configuration. Three low power modes exist for the device. 4.2 Modes of Operation The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during reset (Table 4-1) ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 even located in an external slow memory device. The PE6/MODB/IPIPE1 and PE5/MODA/IPIPE0 pins act as high-impedance mode select inputs during reset. The following paragraphs discuss the default bus setup and describe which aspects of the bus can be changed after reset on a per mode basis ...
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... Internal visibility is available when the MCU is operating in expanded wide modes or special narrow mode not available in single-chip, peripheral or normal expanded narrow modes. Internal visibility is enabled by setting the IVIS bit in the MODE register. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 73 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01. internal access is made while E, R/W, and LSTRB are configured as bus control outputs and internal visibility is off (IVIS=0), E will remain low for the cycle, R/W will remain high, and address, data and the LSTRB pins will remain at their previous state. ...
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... Background debugging should not be used while the MCU is in special peripheral mode as internal bus conflicts between BDM and the external master can cause improper operation of both functions. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 75 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 4.3 Security The device will make available a security feature preventing the unauthorized read and write of the memory contents. This feature allows: • Protection of the contents of FLASH, • Protection of the contents of EEPROM, • Operation in single-chip mode, • ...
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... Low Power Modes Consult the respective Block User Guide for information on the module behavior in Stop, Pseudo Stop, and Wait Mode. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 77 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 78 For More Information On This Product, Go to: www.freescale.com ...
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... For More Information On This Product, MC9S12H256 Device User Guide — V01.18 CCR Local Enable Mask None None COPCTL (CME, FCME) None COP rate select SWI ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Table 5-1 Reset and Interrupt Vector Table Vector Address Interrupt Source $FFC8, $FFC9 $FFC6, $FFC7 $FFC4, $FFC5 CRG Self Clock Mode $FFC2, $FFC3 $FFC0, $FFC1 $FFBE, $FFBF $FFBC, $FFBD $FFBA, $FFBB $FFB8, $FFB9 ...
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... Freescale Semiconductor, Inc. 5.3.2 Memory Refer to Table 1-1 for locations of the memories depending on the operating mode after reset The RAM array is not automatically initialized out of reset. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 81 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 82 For More Information On This Product, Go to: www.freescale.com ...
Page 83
... Consult the ATD_10B16C Block User Guide for information about the Analog to Digital Converter module. Section 10 Inter-IC Bus (IIC) Block Description Consult the IIC Block User Guide for information about the Inter-IC Bus module. Section 11 Serial Communications Interface (SCI) Block Description For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 83 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 There are two Serial Communications Interfaces (SCI0 and SCI1) implemented on the MC9S12H256 device and one SCI (SCI0) on MC9S12H128. Consult the SCI Block User Guide for information about each Serial Communications Interface module. ...
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... Freescale Semiconductor, Inc. There are two MSCAN modules (CAN0 and CAN1) implemented on the MC9S12H256 device. Consult the MSCAN Block User Guide for information on each MSCAN. Section 19 PWM Motor Control (MC) Block Description Consult the MC_10B12C Block User Guide for information about the PWM Motor Control module. ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 21.2 Recommended PCB layout Figure 21-1 LQFP112 recommended PCB layout VDDM1 C7 VSSM1 VDDM2 C6 VSSM2 VDDM3 C5 VSSM3 VDDR/ VDDX2 86 For More Information On This Product, VDDX1 Q1 VSSPLL VDDPLL R1 Go to: www.freescale.com VSS1 C1 VDD1 VDDA C2 VSSA ...
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... Freescale Semiconductor, Inc. Figure 21-2 LQFP144 recommended PCB layout VDDM1 C7 VSSM1 VDDM2 C6 VSSM2 VDDM3 C5 VSSM3 VDDR/ VDDX2 For More Information On This Product, Go to: www.freescale.com MC9S12H256 Device User Guide — V01.18 VDDX1 Q1 VSSPLL VDDPLL R1 VSS1 C1 VDD1 VDDA C2 VSSA 87 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Component The PCB must be carefully laid out to ensure proper operation of the voltage regulator as well as of the MCU itself. The following rules must be observed: • Every supply pair must be decoupled by a ceramic/tantalum capacitor connected as near as possible to the corresponding pins(C1 – ...
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... Those parameters are derived mainly from simulations. A.1.2 Power Supply The MC9S12H256 utilizes several pins to supply power to the I/O ports, A/D converter, oscillator and PLL as well as the digital core. The VDDA, VSSA pair supplies the A/D converter and the resistor ladder of the internal voltage regulator. ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 VDD1, VSS1 and VSS2 are the supply pins for the digital logic, VDDPLL, VSSPLL supply the oscillator and the PLL. VSS1 and VSS2 are internally connected by metal. VDDA, VDDX1, VDDX2, VDDM as well as VSSA, VSSX1, VSSX2 and VSSM are connected by anti-parallel diodes for ESD protection ...
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... The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. 3. All digital I/O pins are internally clamped Ports PU, PV, PW are internally clamped to V For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Rating Symbol V DD5 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 5. Those pins are internally clamped This pin is clamped low to V A.1.6 ESD Protection and Latch-up Immunity All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body Model (HBM), the Machine Model (MM) and the Charge Device Model ...
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... Power dissipation and thermal characteristics are closely related. The user must assure that the maximum operating junction temperature is not exceeded. The average chip-junction temperature (T obtained from: For More Information On This Product, MC9S12H256 Device User Guide — V01.18 and the junction temperature T A Table A-4 Operating Conditions ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01. Junction Temperature Ambient Temperature Total Chip Power Dissipation, [ Package Thermal Resistance, [ C/W] JA The total power dissipation can be calculated from Chip Internal Power Dissipation, [W] INT P INT P is the sum of all output currents on I/O ports associated with VDDX1,2 and VDDM1,2,3. ...
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... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com MC9S12H256 Device User Guide — V01.18 95 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Input High Voltage 2 P Input Low Voltage 3 C Input Hysteresis Input Leakage Current except PU, PV, PW (pins in high impedance input mode ...
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... In expanded modes the currents flowing in the system are highly dependent on the load at the address, data and control signals as well as on the duty cycle of those signals. No generally applicable numbers can be For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Table A-6 5V I/O Characteristics I ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 given. A very good estimate is to take the single chip currents and add the currents due to the external loads. Table A-7 Supply Current Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating Run supply currents ...
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... ATD input. The maximum source resistance R specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or For More Information On This Product, MC9S12H256 Device User Guide — V01.18 This constraint exists since the sample buffer amplifier can not drive Symbol ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source Capacitance When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external and the pin capacitance. For a maximum sampling error of the input voltage 1LSB, then the external filter capacitor ...
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... For the following definitions see also Figure A-1. Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps. The Integral Non-Linearity (INL) is defined as the sum of all DNLs: INL n For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Symbol Min LSB DNL – ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 DNL LSB V i–1 $3FF $3FE $3FD $3FC $3FB $3FA $3F9 $3F8 $3F7 $3F6 $3F5 $3F4 $3F3 Figure A-1 ATD Accuracy Definitions NOTE: Figure A-1 shows only definitions, for specification values refer to Table A-10 . ...
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... The time to program a consecutive word can be calculated as: t The time to program a whole row is: t Burst programming is more than 2 times faster than single word programming. For More Information On This Product, MC9S12H256 Device User Guide — V01. --------------------- ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 A.3.1.3 Sector Erase Erasing a 512 byte Flash sector byte EEPROM sector takes: The setup time can be ignored for this operation. A.3.1.4 Mass Erase Erasing a NVM block takes: The setup time can be ignored for this operation. ...
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... EEPROM cycling performance is 10K cycles at -40˚C to 125˚C. Data retention is specified for 5 years on words after cycling 10K times. However if only 10 cycles are executed on a word the data retention is specified for 15 years. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Rating Cycles 10 10,000 Go to: www ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 106 For More Information On This Product, Go to: www.freescale.com ...
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... A.4.1.3 External Reset When external reset is asserted for a time greater than PW reset, and the CPU starts fetching the reset vector without doing a clock quality check, if there was an oscillation before reset. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Symbol V PORR V ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 A.4.1.4 Stop Recovery Out of STOP the controller can be woken external interrupt. A clock quality check as after POR is performed before releasing the clocks to the system. A.4.1.5 Pseudo Stop and Wait Recovery The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in both modes ...
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... The VCO Gain at the desired VCO output frequency is approximated by: The phase detector relationship is given by the current in tracking mode. ch For More Information On This Product, MC9S12H256 Device User Guide — V01.18 VDDPLL C s Phase f ref K Detector f cmp Loop Divider ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 The loop bandwidth f should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10, C typical values are 50. = 0.9 ensures a good transient response. f < ------------------------------------------ C And finally the frequency relationship is defined as With the above inputs the resistance can be calculated as: ...
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... Defining the jitter as For N < 100, the following equation is a good fit for the maximum jitter: J(N) 1 Figure A-4 Maximum bus clock jitter approximation For More Information On This Product, MC9S12H256 Device User Guide — V01. minN t maxN Figure A-3 Jitter Definitions ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the effect of the jitter to a large extent. Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Self Clock Mode frequency ...
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... Table A-16 MSCAN Wake-up Pulse Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P MSCAN Wake-up dominant pulse filtered 2 P MSCAN Wake-up dominant pulse pass For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Symbol Min t WUP t 5 WUP Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 114 For More Information On This Product, Go to: www.freescale.com ...
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... MOSI 2 MSB OUT (OUTPUT configured as output. 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure A-5 SPI Master Timing (CPHA = 0) For More Information On This Product, MC9S12H256 Device User Guide — V01. BIT LSB IN 9 BIT LSB OUT Go to: www ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01. (OUTPUT SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT) 5 MISO MSB IN (INPUT) 9 MOSI PORT DATA MASTER MSB OUT (OUTPUT configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure A-6 SPI Master Timing (CPHA =1) ...
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... SCK (CPOL 1) (INPUT) 9 MISO SLAVE (OUTPUT MOSI MSB IN (INPUT) Figure A-8 SPI Slave Timing (CPHA =1) For More Information On This Product, MC9S12H256 Device User Guide — V01. BIT SLAVE LSB OUT BIT LSB BIT 6 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Table A-18 SPI Slave Mode Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 200pF on all outputs Num C Rating 1 P Operating Frequency P SCK Period t = 1./f 1 sck Enable Lead Time 3 D Enable Lag Time ...
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... NOTES: 1. Outputs measured one at a time, low impedance voltage source connected to the VLCD pin. 2. Outputs measured one at a time, low impedance voltage source connected to the VLCD pin. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Symbol Min. Typ. ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 120 For More Information On This Product, Go to: www.freescale.com ...
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... A.8.1 General Muxed Bus Timing The expanded bus timings are highly dependent on the load conditions. The timing parameters shown assume a balanced load across all outputs. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 121 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 ECLK PE4 5 9 Addr/Data data (read) PA, PB Addr/Data data (write) PA Non-Multiplexed Addresses PK5:0 ECS PK7 24 R/W PE2 27 LSTRB PE3 30 NOACC PE7 33 IPIPO0 IPIPO1, PE6,5 Figure A-9 General External Bus Timing 122 For More Information On This Product, ...
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... D Low strobe delay time D Low strobe valid time to E rise ( Low strobe hold time 30 D NOACC strobe delay time D NOACC valid time to E rise (PW 31 For More Information On This Product, MC9S12H256 Device User Guide — V01.18 = 50pF LOAD Symbol cyc PW EL ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 32 D NOACC hold time 33 D IPIPO[1:0] delay time D IPIPO[1:0] valid time to E rise ( IPIPO[1:0] delay time ...
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... Freescale Semiconductor, Inc. Appendix B Package Information B.1 General This section provides the physical dimensions of the MC9S12H256 and MC9S12H128 packages. For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 125 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 B.2 112-pin LQFP package 0. PIN 1 112 IDENT 1 VIEW 0.050 C1 VIEW AB Figure B-1 112-pin LQFP mechanical dimensions (case no. 987) 126 For More Information On This Product, 0. TIPS ...
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... BASE D METAL 0. SECTION J1-J1 (ROTATED 90 ) 144 PL Figure B-2 144-pin LQFP mechanical dimensions (case no. 918-03) For More Information On This Product, MC9S12H256 Device User Guide — V01.18 x 0. TIPS xxxxxxxxxxxxxxxx 109 x xxxxxxxxxxx 108 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 128 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. User Guide End Sheet For More Information On This Product, MC9S12H256 Device User Guide — V01.18 Go to: www.freescale.com 129 ...
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... Freescale Semiconductor, Inc. MC9S12H256 Device User Guide — V01.18 130 For More Information On This Product, FINAL PAGE OF 130 PAGES Go to: www.freescale.com ...