M95256-WMW6 STMicroelectronics, M95256-WMW6 Datasheet
M95256-WMW6
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M95256-WMW6 Summary of contents
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... More than 40-Year Data Retention Table 1. Product List Reference M95256 M95256 M95256-W M95256-R M95128 M95128 M95128-W M95128-R October 2004 Figure 1. Packages Part Number M95256 M95128 With High Speed Clock 8 1 PDIP8 (BN) 0.25 mm frame 8 1 SO8 (MN) 150 mil width 8 1 SO8 (MW) ...
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... M95256, M95128 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 3. DIP, SO and TSSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Serial Data Output ( Serial Data Input ( Serial Clock ( Chip Select ( Hold (HOLD Write Protect ( CONNECTING TO THE SPI BUS ...
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... Table 18. AC Characteristics (M95xxx, Device Grade Table 19. AC Characteristics (M95xxx, Device Grade Table 20. AC Characteristics (M95xxx-W, Device Grade Table 21. AC Characteristics (M95xxx-W, Device Grade Table 22. AC Characteristics (M95xxx- Figure 16.Serial Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 17.Hold Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 18.Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 M95256, M95128 3/39 ...
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... M95256, M95128 Figure 19.PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline . . . . . . . . . . . . . . . . . 33 Table 23. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data . . . . . . . . . . 33 Figure 20.SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline . . . . 34 Table 24. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data 34 Figure 21.SO8 wide – ...
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... SUMMARY DESCRIPTION These electrically erasable programmable memo- ry (EEPROM) devices are accessed by a high speed SPI-compatible bus. The memory array is organized as 32768 x 8 bit (M95256) and 16384 x 8 bit (M95128). The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 2 ...
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... M95256, M95128 SIGNAL DESCRIPTION During all operations, V must be held stable and CC within the specified valid range (max). CC All of the input and output signals must be held High or Low (according to voltages specified in Table 13. OL These signals are described next. Serial Data Output (Q). This output signal is used to transfer data serially out of the device ...
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... MCU SPI bus. Only one device is selected at a time, so only one device drives the Serial Data Output (Q) line at a time, all the others being high impedance SPI Memory SPI Memory Device Device HOLD W M95256, M95128 SPI Memory Device S HOLD W HOLD AI03746D 7/39 ...
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... M95256, M95128 SPI Modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: – CPOL=0, CPHA=0 – CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data Figure 5 ...
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... High at the same time as Serial Clock (C) already being Low. Figure 6. also shows what happens if the rising and falling edges are not timed to coincide with Serial Clock (C) being Low. Hold Condition M95256, M95128 , as specified in Table 13 Hold Condition AI02029D Table ...
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... M95256, M95128 Status Register Figure 7. shows the position of the Status Register in the control logic of the device. The Status Reg- ister contains a number of status and control bits that can be read or set (as appropriate) by specific instructions. WIP bit. The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register cycle ...
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... MEMORY ORGANIZATION The memory is organized as shown in Figure 7. Block Diagram HOLD W Control Logic Address Register and Counter Figure 7.. High Voltage Generator I/O Shift Register Data Register 1 Page X Decoder M95256, M95128 Status Register Size of the Read only EEPROM area AI01272C 11/39 ...
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... M95256, M95128 INSTRUCTIONS Each instruction starts with a single-byte code, as summarized in Table 5 invalid instruction is sent (one not contained in Table 5.), the device automatically deselects it- self. 12/39 Table 5. Instruction Set Instruc Description tion WREN Write Enable WRDI Write Disable RDSR Read Status Register WRSR ...
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... The Write Enable Latch (WEL) bit, in fact, be- comes reset by any of the following events: – Power-up – WRDI instruction execution – WRSR instruction completion – WRITE instruction completion Instruction High Impedance AI03750D M95256, M95128 8., to send this instruction to 13/39 ...
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... M95256, M95128 Read Status Register (RDSR) The Read Status Register (RDSR) instruction al- lows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When one of these cycles is in progress rec- ommended to check the Write In Progress (WIP) bit before sending a new instruction to the device ...
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... Status Register are rejected, and are not accepted for execution consequence, all the data bytes in the memory area that are software protected (SPM) by the Block Protect M95256, M95128 3.. Memory Content 1 Unprotected Area Ready to accept Write ...
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... M95256, M95128 (BP1, BP0) bits of the Status Register, are also hardware protected against data modification. Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be entered: – by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W) Low – ...
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... D High Impedance Q Note: The most significant address bits (b15 for the M95256, and bits b15 and b14 for the M95128) are Don’t Care. When the highest address is reached, the address counter rolls over to zero, allowing the Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a single READ instruc- tion ...
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... Instruction D High Impedance Q Note: The most significant address bits (b15 for the M95256, and bits b15 and b14 for the M95128) are Don’t Care. 18/39 Each time a new data byte is shifted in, the least significant bits of the internal address counter are incremented. If the number of data bytes sent to ...
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... C Data Byte Note: The most significant address bits (b15 for the M95256, and bits b15 and b14 for the M95128) are Don’t Care 16-Bit Address ...
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... M95256, M95128 POWER-UP AND DELIVERY STATE Power-up State After Power-up, the device is in the following state: – Standby Power mode – deselected (after Power-up, a falling edge is required on Chip Select (S) before any instructions can be started). – not in the Hold Condition – the Write Enable Latch (WEL) is reset to 0 – ...
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... AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A, C1=100pF, R1=1500 , R2=500 ) this specification, is not implied. Exposure to Ab- solute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Parameter 2 M95256, M95128 Min. Max. Unit –65 150 °C 1 ° ...
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... M95256, M95128 DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC Characteristic tables that follow are de- rived from tests performed under the Measure- Table 8. Operating Conditions (M95xxx) Symbol ...
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... Note: Sampled only, not 100% tested Parameter Input Levels Timing Reference Levels 0.8V CC 0.2V CC Test Condition OUT =25°C and a frequency of 5 MHz. A M95256, M95128 Min. Max. 100 50 0. 0. Input and Output 0.7V CC 0.3V CC AI00825B Min. Max. ...
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... M95256, M95128 Table 13. DC Characteristics (M95xxx, Device Grade 6) Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current CC Supply Current I CC1 (Standby Power mode) V Input Low Voltage IL V Input High Voltage IH 1 Output Low Voltage Output High Voltage ...
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... 0.1V /0. MHz 1 open 1 0. –0 M95256, M95128 Unit Min. Max. ± 2 ± –0. 0.4 0 Unit Min. Max. ± 2 ± 0.5 –0.45 ...
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... M95256, M95128 Table 18. AC Characteristics (M95xxx, Device Grade 6) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH ...
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... HLQZ t t Write Time W WC Note must never be less than the shortest possible clock period Value guaranteed by characterization, not 100% tested in production. Table 11. and Parameter (max) C M95256, M95128 Table 8. Min. Max. D.C. 5 MHz 90 90 100 ...
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... M95256, M95128 Table 20. AC Characteristics (M95xxx-W, Device Grade 6) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH ...
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... Write Time W WC Note must never be less than the shortest possible clock period Value guaranteed by characterization, not 100% tested in production. Table 11. and Table 9. Parameter (max) C M95256, M95128 Unit Min. Max. D.C. 5 MHz 100 ...
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... M95256, M95128 Table 22. AC Characteristics (M95xxx-R) Test conditions specified in Symbol Alt Clock Frequency C SCK Active Setup Time SLCH CSS1 Not Active Setup Time SHCH CSS2 Deselect Time SHSL Active Hold Time CHSH CSH t S Not Active Hold Time ...
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... Figure 16. Serial Input Timing S tCHSL C tDVCH D High Impedance Q Figure 17. Hold Timing HOLD tSLCH tCHSH tCHDX tCLCH MSB IN tHLCH tCHHL tCHHH tHLQZ M95256, M95128 tSHSL tSHCH tCHCL LSB IN AI01447C tHHCH tHHQV AI02032B 31/39 ...
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... M95256, M95128 Figure 18. Output Timing S C tCLQV tCLQX tCLQX Q ADDR.LSB IN D 32/39 tCH tCLQV tQLQH tQHQL tCL tSHQZ LSB OUT AI01449D ...
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... Min. Max. 5.33 0.38 2.92 4.95 0.36 0.56 1.14 1.78 0.20 0.36 9.02 10.16 7.62 8.26 6.10 7.11 – – – – 10.92 2.92 3.81 M95256, M95128 PDIP-B inches Typ. Min. Max. 0.210 0.015 0.130 0.115 0.195 0.018 0.014 0.022 0.060 0.045 0.070 0.010 0.008 0.014 0.365 0.355 0.400 0.310 0.300 0.325 0.250 0.240 0.280 0.100 – ...
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... M95256, M95128 Figure 20. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Outline SO-a Note: Drawing is not to scale. Table 24. SO8 narrow – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data Symb. Typ ...
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... Min. Max. 2.03 0.10 0.25 1.78 0.35 0.45 – – 5.15 5.35 5.20 5.40 – – 7.70 8.10 0.50 0.80 0° 10° 8 0.10 M95256, M95128 inches Typ. Min. 0.004 0.014 0.008 – 0.203 0.205 0.050 – 0.303 0.020 0° 8 Max. 0.080 0.010 0.070 0.018 – 0.211 0.213 – 0.319 0.031 10° 0.004 ...
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... M95256, M95128 Figure 22. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline A CP Note: Drawing is not to scale. Table 26. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data Symbol Typ 1.000 3.000 e 0.650 E 6.400 E1 4.400 L 0.600 L1 1.000 36/ ...
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... Flow (HRCF) is described in the quality note QNEE9801. Please ask your nearest ST sales office for a copy. For a list of available options (speed, package, etc.) or for further information on any aspect of this M95256 – -free and TBBA-free 2 3 device, please contact your nearest ST Sales Of- fice. M95256, M95128 37/39 ...
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... Table 28. Document Revision History Date Rev. New -V voltage range added (including the tables for DC characteristics, AC characteristics, 17-Nov-1999 2.1 and ordering information). New -V voltage range extended to M95256 (including AC characteristics, and ordering 07-Feb-2000 2.2 information). 22-Feb-2000 2.3 tCLCH and tCHCL, for the M95xxx-V, changed from 100ns 15-Mar-2000 2 ...
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