M24512-WMW6T STMicroelectronics, M24512-WMW6T Datasheet
M24512-WMW6T
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M24512-WMW6T Summary of contents
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... More than 1 000 000 Write cycles More than 40-year data retention Packages – ECOPACK® (RoHS compliant) December 2007 M24512-W M24512-R M24512-HR M24256-BW M24256-BR 512 Kbit and 256 Kbit serial I²C bus EEPROM with three Chip Enable lines Rev 9 SO8 (MW) ...
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... ECC (error correction code) and write cycling . . . . . . . . . . . . . . . . . . . . . 16 3.10 Minimizing system delays by polling on ACK . . . . . . . . . . . . . . . . . . . . . . 17 3.11 Read operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.12 Random Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.13 Current Address Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.14 Sequential Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.15 Acknowledge in Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 2/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256- Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Power-down conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 8 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Contents 3/35 ...
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... TSSOP8 – 8 lead thin shrink small outline, package mechanical data Table 18. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 19. Available M24256-Bx products (package, voltage range, temperature grade Table 20. Available M24512-x products (package, voltage range, temperature grade Table 21. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 4/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Table ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. SO and TSSOP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Figure 3. Device select code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Maximum R value versus bus parasitic capacitance (C bus bus at maximum frequency f Figure 5. Maximum R value versus bus parasitic capacitance (C bus bus at maximum frequency f 2 Figure 6 ...
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... Description 1 Description The M24512-W, M24512-R, M24256-BW and M24256-BR devices are I electrically erasable programmable memories (EEPROM). They are organized × 8 bits and 32 Kb × 8 bits, respectively uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I bus definition ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Figure 2. SO and TSSOP connections 1. See Package mechanical M24512-W M24512-R M24256-BW M24256- section for package dimensions, and how to identify pin-1. Description SCL SDA AI04035d 7/35 ...
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... Control (WC) is driven High. When unconnected, the signal is internally read as V Write operations are allowed. When Write Control (WC) is driven High, Device Select and Address bytes are acknowledged, Data bytes are not acknowledged. 8/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR indicates how the value of the pull-up resistor can be calculated M24xxx ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 2.5 V ground the reference for the V SS 2.6 Supply voltage (V 2.6.1 Operating supply voltage V Prior to selecting the memory and issuing instructions to it, a valid and stable V within the specified [V In order to secure a stable DC supply voltage recommended to decouple the V with a suitable capacitor (usually of the order 100 nF) close to the V package pins ...
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... Figure 5. Maximum R bus at maximum frequency f 100 Bus line capacitor (pF) 10/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR value versus bus parasitic capacitance (C bus = 400 kHz C 100 1000 Bus line capacitor (pF) value versus bus parasitic capacitance (C bus = 1 MHz MHz, t ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 2 Figure bus protocol SCL SDA SCL SDA Start condition SCL SDA Table 2. Device select code Device select code 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. ...
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... The device that controls the data transfer is known as the bus master, and the other as the slave device. A data transfer can only be initiated by the bus master, which will also provide the serial clock for synchronization. The M24512-W, M24512-R, M24256-BW and M24256-BR devices are always slaves in all communications. ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 3.5 Memory addressing To start communication between the bus master and the slave device, the bus master must initiate a Start condition. Following this, the bus master sends the device select code, shown in Table 2. (on Serial Data (SDA), most significant bit first). ...
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... Device operation Figure 7. Write mode sequences with (data write inhibited) WC Byte Write WC Page Write WC (cont'd) Page Write (cont'd) 14/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR ACK ACK Dev sel Byte addr Byte addr R/W ACK ACK Dev sel Byte addr Byte addr R/W NO ACK ...
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... M24256-BW and M24256-BR, and b15-b7 for the M24512-W and M24512-R) are the same. If more bytes are sent than will fit up to the end of the row, a condition known as ‘roll-over’ occurs. This should be avoided, as data starts to become overwritten in an implementation dependent way ...
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... Caution: Note that the M24512-W and M24512-R in SO8 Wide package (MW) are offered with either the previous die qualified at 100.000 Write cycles or the new die (qualified at 1 Million Write cycles). The two dice are distinguished by their respective process letter: "V" for the previous die and " ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Figure 9. Write cycle polling flowchart using ACK First byte of instruction with already decoded by the device 3.10 Minimizing system delays by polling on ACK During the internal Write cycle, the device disconnects itself from the bus, and writes a copy of the data from its internal latches to the memory cells ...
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... The output data comes from consecutive addresses, with the internal address counter automatically incremented after each byte output. After the last memory address, the address counter ‘rolls-over’, and the device continues to output data from memory address 00h. 18/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Figure 10. ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Figure 10. Read mode sequences Current Address Read Random Address Read Sequential Current Read Sequential Random Read 1. The seven most significant bits of the device select code of a Random Read (in the 1 be identical. 3.15 Acknowledge in Read mode For all Read commands, the device waits, after each byte read, for an acknowledgment ...
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... European directive on the restriction of the use of certain hazardous substances in electrical and electronic equipment (RoHS) 2002/95/EC. 2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114D 100 pF 1500 , R2 = 500 ) 20/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Table 6 may cause permanent damage to Parameter Min. ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256- and AC parameters This section summarizes the operating and measurement conditions, and the dc and ac characteristics of the device. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parameters ...
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... CC1 Input low voltage V IL (SCL, SDA, WC) Input high voltage V IH (SCL, SDA, WC) V Output low voltage OL 1. Characterized value, not tested in production. 22/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR (1) Parameter Test condition Test conditions (see Parameter and device in Standby mode ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Table 12. DC characteristics (M24xxx-R and M24xxx-HR) Symbol Parameter Input leakage current I LI (E1, E2, SCL, SDA) I Output leakage current LO I Supply current (Read Supply current (Write) CC0 I Standby supply current CC1 Input low voltage V IL (SCL, SDA, WC) ...
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... Values recommended by I²C-bus/Fast-Mode specification avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA. 4. For a re-Start condition, or following a Write cycle. 24/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR M24xxx-R see Parameter Clock frequency Clock pulse width high ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Table 14. 1 MHz AC characteristics (M24xxx-HR, see Symbol Alt SCL t t CHCL HIGH t t CLCH LOW ( XH1XH2 R ( XL1XL2 F ( DL1DL2 DXCX SU:DAT t t CLDX HD:DAT t t CLQX DH (3)( CLQV AA ( CHDX ...
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... SCL tDLCL SDA In tCHDX tXH1XH2 Start condition SCL SDA In tCHDH Stop condition tCHCL SCL tCLQV SDA Out 26/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR tCHCL tCLCH tXL1XL2 tCLDX tDXCX SDA Change SDA Input tW Write cycle tCLQX Data valid Data valid tCHDH tDHDL Start ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 7 Package mechanical Figure 13. SO8W – 8 lead plastic small outline, 208 mils body width, package outline 1. Drawing is not to scale. Table 15. SO8W – 8 lead plastic small outline, 208 mils body width, package mechanical data Symbol ...
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... SO8N – 8 lead plastic small outline, 150 mils body width, package mechanical data Symbol ccc Values in inches are converted from mm and rounded to 4 decimal digits. 28/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR A ccc millimeters Typ Min Max 1.75 0.1 0.25 1.25 0.28 ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Figure 15. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. Table 17. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Symbol Values in inches are converted from mm and rounded to 4 decimal digits. ...
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... ST sales office. The category of second-level interconnect is marked on the package and on the inner box label, in compliance with JEDEC standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 30/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR M24512– ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Table 19. Available M24256-Bx products (package, voltage range, temperature grade) Package SO8N (MN) SO8W (MW) TSSOP (DW) Table 20. Available M24512-x products (package, voltage range, temperature grade) Package SO8N (MN) SO8W (MW) TSSOP (DW) M24256-BW 2 5.5 V Range 6 Range 6 Range 6 M24512-W M24512-R 2 5 5.5 V Range 6 ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Lead Soldering Temperature in the Absolute Maximum Ratings table amended Write Cycle Polling Flow Chart using ACK illustration updated 1.1 LGA8 and SO8(wide) packages added References to PSDIP8 changed to PDIP8, and Package Mechanical data ...
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... Note 1 removed from Table 11: DC characteristics SO8W package specifications modified in mechanical. Table 19: Available M24256-Bx products (package, voltage range, temperature grade) and Table 20: Available M24512-x products (package, voltage range, temperature grade) Section 2.5: VSS ground added. Small text changes. V max changed and Note 1 ...
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... Revision 14-Dec-2007 34/35 M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR 1 MHz frequency introduced (M24512-HR root part number). Section 2.6.3: Device reset Figure 4: Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C ...
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... M24512-W, M24512-R, M24512-HR, M24256-BW, M24256-BR Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...