AT24C256 ATMEL Corporation, AT24C256 Datasheet

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... GND 4 SDA 5 4 Bottom View 8-lead MAP VCC SCL SDA 5 4 GND Bottom View 2-wire Serial EEPROMs 128K (16,384 x 8) 256K (32,768 x 8) AT24C128 AT24C256 8 VCC SCL 5 SDA 8 VCC SCL 5 SDA Rev. 0670J–SEEPR–4/03 1 ...

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Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Block Diagram AT24C128/256 2 *NOTICE: ...

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Pin Description SERIAL CLOCK (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA (SDA): The SDA pin is bidirectional for serial data transfer. ...

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Pin Capacitance Applicable over recommended operating range from T Symbol Test Condition C Input/Output Capacitance (SDA) I/O C Input Capacitance ( Note: 1. This parameter is characterized and is not 100% tested. (1) DC Characteristics ...

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AC Characteristics Applicable over recommended operating range from T erwise noted). Test conditions are listed in Note 2. Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Clock Low ...

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Device CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (refer to Data Operation Validity timing diagram). Data changes during SCL ...

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Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORD n Note: 1. The write cycle time t is the time from a valid stop condition ...

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Data Validity Start and Stop Definition Output Acknowledge AT24C128/256 8 0670J–SEEPR–4/1/03 ...

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Device The 128K/256K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (refer to Figure 1). The device address word con- Addressing sists of a mandatory one, zero ...

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Read Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: Operations current address read, random address read ...

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Figure 3. Page Write Notes: Figure 4. Current Address Read Figure 5. Random Read Notes: Figure 6. Sequential Read 0670J–SEEPR–4/1/ DON’T CARE bit) († = DON’T CARE bit for the 128K DON’T CARE bit) († = ...

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AT24C128 Ordering Information Ordering Code AT24C128-10PI-2.7 AT24C128N-10SI-2.7 AT24C128W-10SI-2.7 AT24C128-10UI-2.7 AT24C128Y1-10YI-2.7 AT24C128-10TI-2.7 AT24C128-10PI-1.8 AT24C128N-10SI-1.8 AT24C128W-10SI-1.8 AT24C128-10UI-1.8 AT24C128Y1-10YI-1.8 AT24C128-10TI-1.8 AT24C128N-10SJ-2.7 AT24C128N-10SJ-1.8 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC ...

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... AT24C256 Ordering Information Ordering Code AT24C256-10PI-2.7 AT24C256N-10SI-2.7 AT24C256W-10SI-2.7 AT24C256-10UI-2.7 AT24C256-10TI-2.7 AT24C256-10PI-1.8 AT24C256N-10SI-1.8 AT24C256W-10SI-1.8 AT24C256-10UI-1.8 AT24C256-10TI-1.8 AT24C256N-10SJ-2.7 AT24C256N-10SJ-1.8 Note: For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" ...

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Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

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JEDEC SOIC 3 2 Top View e D Side View End View Note: This drawing is for general information only. Refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums, etc. 2325 Orchard Parkway San ...

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EIAJ SOIC 1 N Top View Side View End View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper ...

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Pin 1 Mark this corner D Top View Bottom View Notes: 1. This drawing is for general information only. No JEDEC Drawing to refer to ...

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MAP D E Top View Side View 2325 Orchard Parkway San Jose, CA 95131 R AT24C128/256 End View A SYMBOL TITLE 8Y1, 8-lead (4.90 x 3.00 ...

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... SYMBOL Side View TITLE 8U6, 8-ball 0.75 pitch, Die Ball Grid Array Package (dBGA) AT24C256 (AT19884) AT24C128/256 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX NOTE − − D 3.73 D1 0.74 TYP − − E 2.25 E1 0.75 TYP e 0.75 TYP d 0 ...

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TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

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... Fax: (81) 3-3523-7581 Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...