TLE 6251G Infineon Technologies, TLE 6251G Datasheet - Page 24

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TLE 6251G

Manufacturer Part Number
TLE 6251G
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 6251G

Packages
P-DSO-14
Transmission Ratemax
1.0 Mbit/s
Quiescent Current (max.)
< 30 µA @ 5V standby
Bus Wake-up Capability
Yes
Additional Features
NSTB, WK, EN, NERR, INH, Vio
Wake-up Inputs
Bus wake-up + wake-up pin
Table 5
4.75 V <
°C <
otherwise specified.
Parameter
Transmission Input TxD
HIGH level input voltage
threshold
LOW level input voltage
threshold
TxD input hysteresis
HIGH level input current
TxD pull-up resistance
Mode Control Inputs EN, NSTB
HIGH level input voltage
threshold
LOW level input voltage
threshold
Input hysteresis
LOW level input current
Pull-down resistance
Diagnostic Output NERR
HIGH level output voltage
LOW level output voltage
Short circuit current
Short circuit current
Final Data Sheet
T
j
< 150 °C; all voltages with respect to ground; positive current flowing into pin; unless
V
CC
< 5.25 V; 3.0 V <
Electrical Characteristics (cont’d)
Symbol
V
V
V
I
R
V
V
V
I
R
V
V
I
I
V
TD
MD
SC,NERR
SC,NERR
TD,H
TD,L
TD,hys
TD
M,H
M,L
M,hys
M
NERR,H
NERR,L
µC
< 5.25 V; 6.0 V <
Min.
0.30 ×
V
100
-5
10
0.30 ×
V
100
-5
10
0.8 ×
V
µC
µC
µC
24
Limit Values
Typ.
0.52 ×
V
0.48 ×
V
400
0
20
0.52 ×
V
0.48 ×
V
400
0
20
20
13
µC
µC
µC
µC
V
S
< 40 V;
Max.
0.7 ×
V
1000
5
40
0.7 ×
V
1000
5
40
0.2 ×
V
48
25
µC
µC
µC
R
Unit Test Condition
V
V
mV
µA
kΩ
V
V
mV
µA
kΩ
V
V
mA
mA
L
= 60 Ω; normal mode; -40
recessive state
dominant state
Not subject to
production test
Specified by design.
V
Not subject to
production test
Specified by design.
V
I
I
V
V
NERR
NERR
TxD
EN
µC
µC
Rev. 3.3, 2008-06-19
/
= 5.25 V
= 3.3 V
V
=
= -100 µA
= 1.25 mA
NSTB
TLE 6251 G
V
µC
= 0V

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