BTS 5590G Infineon Technologies, BTS 5590G Datasheet - Page 14

• Manufacturer Part Number: BTS 5590G
• Manufacturer: Infineon Technologies

Specifications of BTS 5590G

• Packages: PG-DSO-36
• Channels: 5.0
• Channel Mix: 2*25mohm+1*40mohm+2*100mohm
• Led Mode: Yes
• Cranking Mode: No
• Pwm Engine Integrated: No

SPOC - BTS5590G
Power Supply
5.2
Reset
There are several reset trigger implemented in the device. They reset the SPI registers to their default values. The
power stages as well as the analog watchdog block are not affected by the reset signals.
The first SPI transmission after any kind of reset contains at pin SO the read information from register OUT, and
the transmission error bit TER is set.
Power-On Reset
V
V
The power-on reset is released, when
voltage level is higher than
. The SPI interface can be accessed
DD
DD(PO)
t
after wake up time
.
WU(PO)
Reset Command
There is a reset command available to reset all register bits of the register bank and the diagnosis registers. As
soon as HWCR.RST = 1, a reset is triggered equivalent to power-on reset. The SPI interface can be accessed after
t
transfer delay time
.
CS(td)
Limp Home Mode
In limp home mode, the SPI write-registers are reset. The SPI interface is operating normally, so the limp home
register bits LHO and LHEN as well as the error flags can be read.
Data Sheet
14
Rev. 1.3, 2007-10-30