TLE 8203E Infineon Technologies, TLE 8203E Datasheet
TLE 8203E
Specifications of TLE 8203E
Related parts for TLE 8203E
TLE 8203E Summary of contents
Page 1
...
Page 2
... Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 9.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 10 Power-Outputs 8 and 10 (Lamp drivers 10.1 Protection and Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 10.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 11 Logic In- and Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 11.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 12 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 12.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 13 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 14 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Final Data Sheet 2 TLE 8203E Table of Contents Rev. 1.0, 2009-02-04 ...
Page 3
... AEC Qualified Functional Description The TLE 8203E is an Application Specific Standard Product for automotive mirror control applications. It includes the power stages necessary to drive mirror loads such as mirror position, mirror defrost and 5W or 10W lamp, i.e. turn signal monolithic die based on Infineon’s smart mixed technology SPT which combines bipolar and CMOS control circuitry with DMOS power devices ...
Page 4
... CLK DI DO PWM1 PWM2 ISO OUT8 OUT10 Figure 1 Block Diagram Final Data Sheet Charge- pump Biasing RevPol MOS driver Fault- Detect SPI Logic and Latch Logic IN current sense MUX GND 4 TLE 8203E Block Diagram OUT4 OUT5 OUT6 OUT7 Rev. 1.0, 2009-02-04 ...
Page 5
... SPI xsel1 bits in control register CtrlReg01. 7 PWM2 Logic Input for Direct Power Stage Control; direct input to control the switches selected by the SPI xsel2 bits in control register CtrlReg11. Final Data Sheet V pins must be connected externally TLE 8203E Pin Configuration Rev. 1.0, 2009-02-04 ...
Page 6
... Power-Output of High-Side Switch output 8; DMOS high-side switch (lamp driver) 31, 32 OUT7 Power Output of High-Side Switch output 7; DMOS high-side switch (mirror heat) 34 OUT4 Power-Output of Half-Bridge output 4; DMOS half-bridge (sum of mirror position). 35 N.C. Not Connected Final Data Sheet is recommended. 6 TLE 8203E Pin Configuration Rev. 1.0, 2009-02-04 ...
Page 7
... Final Data Sheet General Product Characteristics Symbol Limit Values Min. Max -0.3 5.5 DD -0 -40 150 j T -50 150 stg V – 4 ESD V – 2 ESD 7 TLE 8203E Unit Conditions V – V – V – V – C – C – Rev. 1.0, 2009-02-04 ...
Page 8
... CLK T -40 150 j Symbol Limit Values Min. Typ. Max. R – 5 – thjC R – 25 – thjA 8 TLE 8203E General Product Characteristics Unit Conditions V – V (Limit Values Deviations possible) V – V (Limit Values Deviations possible) MHz – C – Unit Conditions 1) K K/W Rev. 1.0, 2009-02-04 ...
Page 9
... Min. Typ. V – – UVON V 4.0 – UVOFF V – 0.25 UVHY V 21 – OVOFF V 20 – OVON V 0.5 1 OVHY 9 TLE 8203E Monitoring Functions rises again and reaches the switch falls again S Unit Conditions Max. V 5.2 V increasing S V 5.0 V decreasing – UVON UVOFF ...
Page 10
... V 0 – ISO4 k – 1000 ILIS4 k – – ILISacc4 V 0 – ISO7 k – 2000 ILIS7 k – – ILISacc7 10 TLE 8203E Monitoring Functions Unit Conditions Max. 170 C – – K – 200 C – – 170 C – – K – – – – Chapter 12). ...
Page 11
... Sleep-Mode The TLE 8203E can be put in a low current-consumption mode by setting the input INH to LOW. The INH pin has an internal pull-down current source. In sleep-mode, all output transistors are turned off and the SPI is not operating. When enabling the IC by setting INH from Power-On Reset is performed as described above. ...
Page 12
... Figure 4. The control word transmitted from the master to the TLE 8203E is executed at the end of the SPI transmission (CSN L -> H) and remains valid until a different control word is transmitted or a power on reset occurs. At the beginning of the SPI transmission (CSN H -> L), the diagnostic data currently valid are latched into the SPI and transferred to the master ...
Page 13
... HS6ON x HS8ON x x OpL7ON HS10ON Testmode = 0 x IS_2 IS_2 IS_1 IS_1 IS_0 IS_0 SRR SRR RA_1 = 0 RA_1 = 1 RA_0 = 1 RA_0 = 0 13 TLE 8203E Register generic data Address generic data CtrlReg 11 PWM2 Input Select HS7sel2 HS8sel2 x HS10sel2 OpL8ON ...
Page 14
... HS4OvL x LS5OvL x HS5OvL x LS6OvL x HS6OvL HS7OpL HS8OvL HS10OvL x x PSF PSF TSD TSD TLE 8203E ISO Chapter 7.4). StatReg 11 Mirror and Lamp-driver Open Load valid for input data LS4OpL x LS5OpL x LS6OpL x HS8OpL x HS10OpL x PSF TSD TW Rev. 1.0, 2009-02-04 SPI ...
Page 15
... StatReg 01 StatReg 10 Lock and Mirror Heat Mirror and Lamp-driver Open Load Overload EF_11 EF_11 EF_10 EF_01 EF_00 EF_00 V overvoltage threshold TLE 8203E StatReg 11 Mirror and Lamp-driver Open Load EF_10 EF_01 EF_00 V V pin is below the undervoltage S S Rev. 1.0, 2009-02-04 SPI ...
Page 16
... Figure 5 Status Register Addressing and Reset 7.4.1 Error-Flag In addition to the 16 bits transferred from the TLE 8203E to the SPI master, an additional Error Flag (EF) is transmitted at the DO pin. The EF status is shown on the DO pin after CSN H -> L, before the first rising edge at CLK, as shown in Figure 6 ...
Page 17
... – – – – DOsetup t 50 – DOhold t 5 – nodata f – – – 17 TLE 8203E Unit Conditions Max. 1) – – – – – – ...
Page 18
... PWM1 {HS7, HS8, HS10} Gate driver power transistor x PWM2 Power Stage x x OFF OFF OFF OFF Rev. 1.0, 2009-02-04 TLE 8203E SPI OUT x ...
Page 19
... As an example motor is connected between outputs OUT 4 and OUT 5 with a broken wire as shown in Figure 10, the resulting diagnostic information is shown in Final Data Sheet V s Figure OCD Table 6. 19 TLE 8203E Power-Outputs 4-6 (Bridge Outputs) I for longer than the shutdown delay SD t dSD t in ON-state for longer than the open-load Rev. 1.0, 2009-02-04 ...
Page 20
... Limit Values Unit Conditions Typ. Max. I 0.3 – OUT 0.4 0.7 OUT T = 150 100 s S resistive load 100 s Figure Figure 12 t – – s dONL4 Rev. 1.0, 2009-02-04 TLE 8203E = see and t - dOFFH4 ...
Page 21
... DHL56 t 3 – DLH56 I 1.25 1.5 SD56 dSD56 I – 3.0 SC56 OCD56 t 200 350 dOC56 21 TLE 8203E Unit Conditions Max – dONH4 dOFFL4 8 A high- and low- side 50 s – low-side 600 0.2 V OUT Un Conditions it Max ...
Page 22
... OUT56_leakage CSN OUTx t dO FFH 10% OUTx CSN low-side OFF delay time OUTx t dO FFL high-side ON delay time OUTx TLE 8203E Un Conditions it Max 0.2 V OUT high-side OFF delay time t DHL 90% low-side ON delay time 90% t DLH 10% Rev. 1.0, 2009-02-04 ...
Page 23
... Final Data Sheet I as shown in Figure 13 The open load error bit is latched and can be reset by the SPI status register 23 TLE 8203E Power-Output 7 (Mirror Heater Driver) I for longer than the Figure 10. The output is pulled Rev. 1.0, 2009-02- OpL ...
Page 24
... I 6.25 8 SD7 dSD7 I – 12 SC7 I 100 – OpL7 24 TLE 8203E I OpL OUT 7 high-side switch 7 R Load + V OpL - Unit Conditions Max. I – = 2.5 A; OUT 0.17 = 2.5 A OUT T = 150 resistive load of ...
Page 25
... C to +150 C; INH = High; all outputs open, all voltages with j Symbol Limit Values Min. Typ – OpL7 t – – dOC7 I – – OUT7_leakage t R ISE 90% t dON 10% 25 TLE 8203E Unit Conditions Max – 200 s – GND OUT t FALL 90% t dOFF 10% Rev. 1.0, 2009-02-04 ...
Page 26
... V . During the delay time, the current is limited to SD8 TLE 8203E Power-Outputs 8 and 10 (Lamp drivers) I SD8 I as shown in SC8 t dSD on8 t Rev. 1.0, 2009-02-04 and the Figure 16 ...
Page 27
... The open load error bit is latched and can be reset by the SPI status register Gate driver 1 & 27 TLE 8203E Power-Outputs 8 and 10 (Lamp drivers) I for longer than the shutdown delay SD t dSD 8 t Figure 18. The output is pulled I OpL OUT x ...
Page 28
... I 100 – OpL8, – OpL8,10 t – – dOC8,10 I – – OUT810_leakage t R ISE 90% t dON 10% 28 TLE 8203E Unit Conditions Max. I – = +0.5 A; OUT 0.8 = +0.5 A OUT T = 150 resistive load see ...
Page 29
... ICSN Input C – DOH DD DD 1.0 0.7 V – 0.2 DOL I -10 – DOLK 1) C – TLE 8203E Logic In- and Outputs Unit Conditions Max rising IN V – V falling IN 600 mV – IINH rising IN V – V falling IN 600 mV – ...
Page 30
... CLK SCLK SDI DO SDO PWM1 TIMER 1 PWM2 TIMER 2 ISO A/D Rsense 700 Ω DIG_GND 30 Application Information IPD 30N03S2L-07 < 40V 47uF // 3.3nF 2 x 100 TLE 8203 E OUT 4 mirror-x OUT 5 DI mirror-y OUT 6 OUT 7 mirror-heat OUT 8 OUT 10 POWER_GND Rev. 1.0, 2009-02-04 TLE 8203E M M ...
Page 31
... Infineon Internet Page “Products”: http://www.infineon.com/products. Final Data Sheet C 0.1 C 36x SEATING PLANE A 36x Ejector Mark Leadframe X Y A6901-C001 7 5.1 A6901-C003 7 5.1 A6901-C007 5.2 4.6 A6901-C008 6.0 5.4 31 TLE 8203E Package Outlines 0.35 x 45˚ 1) 7.6 -0.2 0.7 ±0.2 10.3 ±0.3 D Bottom View 19 36 Exposed Diepad Index Marking PG-DSO-36-24, -38, -41, -42, -50-PO Dimensions in mm Rev. 1.0, 2009-02-04 V09 ...
Page 32
... Revision History 0.9 Version Date Changes 1.0 03.02.09 Final Data Sheet Release Final Data Sheet 32 TLE 8203E Revision History Rev. 1.0, 2009-02-04 ...
Page 33
... Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life ...