TLE 8264E Infineon Technologies, TLE 8264E Datasheet - Page 78

• Manufacturer Part Number: TLE 8264E
• Manufacturer: Infineon Technologies

Specifications of TLE 8264E

• Packages: PG-DSO-36
• Transceiver: High Speed CAN ISO 11898 - 5 / 3 x LIN2.1 / J2602
• Voltage Regulator Output: 2 x 200 mA + 400 mA
• Watchdog: Standard and Window Watchdog
• Quiescent Current (max.): 28 ?A (typ) Sleep Mode (5V on)
• Standby Current: 58 ?A (typ) Stop Mode (5V on)

Figure 42
Figure 43
15.5
15.5.1
The WD Refresh bit is used to trigger the Watchdog. The first trigger should be a
please refer to
The WK state bit gives the voltage level at the WK pin. A
Data Sheet
INTERRUPT
Status or
REGISTER
event
Output
Data
16-bit SPI Output Data / Control Word
16-bit SPI Output Data / Control Word
SPI Data Encoding
WD Refresh bit / WK state
Chapter
MSB
15 14 13 12 11 10
state
WK
11.2.
WD set
Wrong
WD to
10.4k
CHK
SUM
Res.
Res.
INT
LIN
LH
On/off
Cyclic
On/Off
Reset
Res.
Res.
CAN
RM1
WK
WD
1
Configuration Registers
On/off
Cyclic
CAN
Res.
L.H.
Out /
RM0
Win.
WK
Fail
SPI
Ti.
0
WK pin
On/Off
I
Set to
WK 1
I
LH 2
CC3max
V
Res.
Res.
CC3
CC2
1
Reserved
>
WK pin
On /off
WK PIN
WK 0
failure
LH 1
Res.
LIN1
V
Window /Time out Watchdog
UV
1
Timing Bit Position: 10 .. 6
cc3
On/off
failure
Res.
LH 0
LIN1
V
V
Res.
UV
9
CC3
CC2
0
78
Test 2
Reset
Delay
Res.
CAN
Res.
V
1
Bus
8
OT
CC2
indicates a high level, a
Test 1 Test 0
failure
HS CAN
LIN1
CAN
RT1
LIN1
WK
7
OT
1
1
failure
V
CAN
LIN 1
RT0
OTP
CAN
WK
6
cc1µC
0
0
CS2
Configuration Select
5
001
011
010
110
000
100
101
111
CS1
4
1
, and then a
CS0
0
3
Serial Peripheral Interface
SPI_Settings_out_TLE8262.vsd
a low level.
Mode Selection
MS2
2
SW Flash
Reserved
Fail Safe
Rev. 1.0, 2009-03-31
Restart
Normal
Sleep
Stop
Bits
Init
0
MS1
1
. For more details,
LSB
MS0
0
TLE8264E
011
101
001
100
110
111
000
010