IRMCK371PROG International Rectifier, IRMCK371PROG Datasheet - Page 10
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IRMCK371PROG
Manufacturer Part Number
IRMCK371PROG
Description
A high performance OTP based motion control IC designed primarily for appliance applications.
Manufacturer
International Rectifier
Datasheet
1.IRMCK371.pdf
(33 pages)
Specifications of IRMCK371PROG
Package
QFP48
4.1
UART Interface
Discrete I/O Interface
Analog Output Interface
Crystal Interface
Reset Interface
I
4.2
PWM
Fault
Rev 1.0
2
C/SPI Interface
P1.2/TXD
P1.1/RXD
P1.0/T2
P1.1/RXD
P1.2/TXD
P1.3/SYNC/SCK Input/output port 1.3, can be configured as SYNC output or SPI clock
P1.4/CAP
P2.0/NMI
P2.1
P3.0/INT2/CS1
P3.2/INT0
AOPWM
XTAL0
XTAL1
RESET
SCL/SO-SI
SDA/CS0
P3.0/INT2/CS1
P1.3/SYNC/SCK Input/output, SYNC output or SPI clock, needs to be pulled up to VDD1
PWMUH
PWMUL
PWMVH
PWMVL
PWMWH
PWMWL
GATEKILL
8051 Peripheral Interface Group
Motion Peripheral Interface Group
Output, Transmit data from IRMCK371, can be configured as P1.2
Input, Receive data to IRMCK371, can be configured as P1.1
Input/output port 2.1
1
Input, connected to crystal
Output, connected to crystal
external RC time constant
in order to boot from I
logic sense
Input/output port 1.0, can be configured as Timer 2 input
Input/output port 1.1, can be configured as RXD input
Input/output port 1.2, can be configured as TXD output
Input/output port 1.4, can be configured as Capture Timer input
Input/output port 2.0, can be configured as non-maskable interrupt input
Input/output port 3.0, can be configured as INT2 input or SPI chip select
Input/output port 3.2, can be configured as INT0 input
Output, PWM output 0, 8-bit resolution, configurable carrier frequency
Inout, system reset, needs to be pulled up to VDD1 but doesn’t require
Input/output, I
Input/output, I
Input/output, INT2 or SPI chip select 1
Output, PWM phase U high side gate signal
Output, PWM phase U low side gate signal
Output, PWM phase V high side gate signal
Output, PWM phase V low side gate signal
Output, PWM phase W high side gate signal
Output, PWM phase W low side gate signal
Input, upon assertion, this negates all six PWM signals, programmable
2
2
C clock output or SPI data
C Data line or SPI chip select 0
2
C EEPROM