IRMCK171TR International Rectifier, IRMCK171TR Datasheet - Page 11

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IRMCK171TR

Manufacturer Part Number
IRMCK171TR
Description
A high performance OTP based motion control IC designed primarily for appliance applications.
Manufacturer
International Rectifier
Datasheet

Specifications of IRMCK171TR

Package
QFP48

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4.2
PWM
Fault
4.3
4.4
4.5
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PWMUH
PWMUL
PWMVH
PWMVL
PWMWH
PWMWL
GATEKILL
AVSS
AREF
CMEXT
IFB+
IFB-
IFBO
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5+
AIN5-
AIN5O
VDD1
VDDCAP
VSS
P5.2/TMS
TDO
P5.1/TDI
TCK
Motion Peripheral Interface Group
Analog Interface Group
Power Interface Group
Test Interface Group
Output, PWM phase U high side gate signal, internally pulled down by 58kΩ
Output, PWM phase U low side gate signal, internally pulled down by 58kΩ
Output, PWM phase V high side gate signal, internally pulled down by 58kΩ
Output, PWM phase W high side gate signal, internally pulled down by 58kΩ
Output, PWM phase W low side gate signal, internally pulled down by 58kΩ
pulled up by 70kΩ
0.6V buffered output
Unbuffered 0.6V, input to the AREF buffer, capacitor needs to be connected.
Input, Analog input channel 0 (0 – 1.2V), typically configured for DC bus voltage
input
Input, Analog input channel 1 (0 – 1.2V), needs to be pulled down to AVSS if
unused
Input, Analog input channel 2 (0 – 1.2V), needs to be pulled down to AVSS if
unused
Input, Analog input channel 3 (0 – 1.2V), needs to be pulled down to AVSS if
unused
Input, Analog input channel 4 (0 – 1.2V), needs to be pulled down to AVSS if
unused
Input, Operational amplifier positive input for shunt resistor current sensing
Input, Operational amplifier negative input for shunt resistor current sensing
Output, Operational amplifier output for AIN5 output, there is a single
sample/hold circuit on the output
Digital power (3.3V)
Internal 1.8V output, requires capacitors to the pin. Shared with analog power
pad internally
JTAG data output
Output, PWM phase V low side gate signal, internally pulled down by 58kΩ
Input, upon assertion, this negates all six PWM signals, active low, internally
Analog power return, (analog internal 1.8V power is shared with VDDCAP)
Input, Operational amplifier positive input for shunt resistor current sensing
Input, Operational amplifier negative input for shunt resistor current sensing
Output, Operational amplifier output for shunt resistor current sensing
Digital common
JTAG test mode input or input/output digital port
JTAG data input, or input/output digital port
JTAG test clock
IRMCK171
11

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