IR3898MTR1PBF International Rectifier, IR3898MTR1PBF Datasheet - Page 19
IR3898MTR1PBF
Manufacturer Part Number
IR3898MTR1PBF
Description
6A Highly Integrated Single-Input Voltage, Synchronous Buck Regulator in a PQFN package.
Manufacturer
International Rectifier
Datasheet
1.IR3898MTR1PBF.pdf
(42 pages)
Specifications of IR3898MTR1PBF
Part Status
Active and Preferred
Package
PQFN / 4 x 5
Circuit
Single Output
Iout (a)
6
Switch Freq (khz)
0 - 1500
Input Range (v)
1.0 - 16
Output Range (v)
0.5 - 12
Pbf
PbF Option Available
SOFT‐START
IR3898 has an internal digital soft‐start to control the
output voltage rise and to limit the current surge at the
start‐up. To ensure correct start‐up, the soft‐start
sequence initiates when the Enable and Vcc rise above
their UVLO thresholds and generate the Power On Ready
(POR) signal. The internal soft‐start (Intl_SS) signal linearly
rises with the rate of 0.2mV/µs from 0V to 1.5V. Figure 7
shows the waveforms during soft start (also refer to Fig.
20). The normal Vout start up time is fixed, and is equal to:
During the soft start the over‐current protection (OCP) and
over‐voltage protection (OVP) is enabled to protect the
device for any short circuit or over voltage condition.
OPERATING FREQUENCY
The switching frequency can be programmed between
300kHz – 1500kHz by connecting an external resistor from
R
versus R
SHUTDOWN
IR3898 can be shutdown by pulling the Enable pin below
its 1.0V threshold. This will tri‐state both the high side and
the low side driver.
t
pin to Gnd. Table 1 tabulates the oscillator frequency
T
Figure 7: Theoretical operation waveforms during
start
t
.
Intl_SS
soft‐start (non tracking / non sequencing)
Vout
19
POR
0.65V-0.15V
0.2mV/ s
0.15V
FEBRUARY 02, 2012 | DATA SHEET | Rev 3.2
t
1
0.65V
t
2
1.5V
t
3
2.5ms
Single‐Input Voltage, Synchronous Buck Regulator
3.0V
(1)
- 19 -
6A Highly Integrated SupIRBuck
T
OVER CURRENT PROTECTION
The over current (OC) protection is performed by sensing
current through the R
method enhances the converter’s efficiency, reduces cost
by eliminating a current sense resistor and any layout
releated noise issues. The current limit is pre‐set internally
and is compensated according to the IC temperature. So at
different ambient temperature, the over‐current trip
threshold remains almost constant.
Over Current Protection circuit senses the inductor current
flowing through the Synchronous Mosfet closer to the
valley point. OCP circuit samples this current for 40nsec
typically after the rising edge of the PWM set pulse which
has a width of 12.5% of the switching period.The PWM
pulse starts at the falling edge of the PWM set pulse.This
makes valley current sense more robust as current is
sensed close to the bottom of the inductor downward
slope where transient and switching noise are lower and
helps to prevent false tripping due to noise and transient.
An OC condition is detected if the load current exceeds the
threshold, the converter enters into hiccup mode. PGood
will go low and the internal soft start signal will be pulled
low. The converter goes into hiccup mode with a 20.48ms
(typ.) delay as shown in Figure 8. The convertor stays in
this mode until the over load or short circuit is removed.
The actual DC output current limit point will be greater
than the valley point by an amount equal to approximately
half of peak to peak inductor ripple current. The current
limit point will be a function of the inductor value, input
,output voltage and the frequency of operation.
ABLE
1:
S
WITCHING
F
Rt (KΩ)
REQUENCY
80.6
60.4
48.7
39.2
29.4
26.1
23.2
19.1
17.4
16.2
34
21
15
DS(on)
of the Synchronous Mosfet. This
(F
S
TM
Freq (KHz)
)
VS
1000
1100
1200
1300
1400
1500
300
400
500
600
700
800
900
.
E
XTERNAL
IR3898
R
ESISTOR
PD‐97662
(R
T
)