TB6560AFG Toshiba, TB6560AFG Datasheet - Page 28

• Manufacturer Part Number: TB6560AFG
• Manufacturer: Toshiba

Specifications of TB6560AFG

• Function: Driver
• Vopmax (vm*): 34V (40V)
• Io (lpeak): 1.5A (2.5A)
• Excitation: 1/16 step
• I/f: CLK input
• Mixed Decay Mode: included
• Package: THQFP64
• Rohs Compatible†: yes

1. Power-on Sequence with Control Input Signals
2. Power Dissipation
3. Treatment of Heat-Radiating Fin
4. Thermal Shutdown (TSD)
Turn on V
Hold the control input pins Low while turning on V
(All the control input pins are internally pulled down.)
After V
set High. If this sequence is not properly followed, the IC may not operate correctly, or the IC and the
peripheral parts may be damaged.
When RESET is released High, the CLK signal is applied and excitation is started. Only after ENABLE
is also set High, outputs are enabled. When only RESET is set High, outputs are disabled and only the
internal counter advances. Likewise, when only ENABLE is set High, the excitation will not be performed
even if the CLK signal is applied and the outputs will remain in the initial state.
An example of a control input sequence is shown below.
A power-off sequence should be the reverse of this sequence.
<Recommended Control Input Sequence>
The power dissipation of the IC can be calculated by the following equation:
P = V
The higher the ambient temperature, the smaller the power dissipation.
Examine the PD-T
The heat-radiating fin pins of the TB6560AHQ/AFG (backside) are electrically connected to the backside of
the die. Thus, if a current flows to the fin, the IC may malfunction. If there is any possibility of a voltage
being generated between grounds and the fin, the fin pins should either be connected to ground or
insulated.
When the die temperature reaches 170°C (typ.), the thermal shutdown circuit is tripped, switching the
outputs to off. There is a variation of about ±20°C in the temperature at which the thermal shutdown
circuit is tripped.
Internal current setting
DD
Output current setting
DD
× I
DD
and VM
DD
. Then, when the V
+ I
ENABLE
OUT
RESET
a
A/B
OUT
characteristic curve to determine if there is a sufficient margin in the thermal design.
CLK
× I
completely stabilizes at the rated voltages, the RESET and ENABLE pins can be
OUT
H
H
H
L
L
L
× Ron × 2 phases
Internal current setting: Disabled;
DD
voltage has stabilized, turn on VM
Output OFF
Z
Z
28
DD
and VM
A/B
.
Internal current setting: Enabled
A/B
Output
.
TB6560AHQ/AFG
2011-01-18