TC90101FG Toshiba, TC90101FG Datasheet - Page 17

• Manufacturer Part Number: TC90101FG
• Manufacturer: Toshiba

Specifications of TC90101FG

• Function: Multi-standard color decoder and 3L Y/C separation
• Features: 525p/625p freq. detectionPicture improverITU-R656 output
• Power Requirements: 3.3V, 2.5V, 1.5V
• Package: LQFP100 (lead-free)

* : Every blank register must be set “0”.
Feb./2005
INIT:00H
INIT:00H
INIT:08H
INIT:5BH
INIT:1CH
INIT:00H
INIT:4EH
INIT:85H
INIT:A6H
INIT:48H
INIT:90H
INIT:00H
INIT:00H
INIT:00H
INIT:07H
INIT:00H
1AH
1BH
1CH
1DH
1EH
1FH
Sub
10H
11H
12H
13H
14H
15H
16H
17H
18H
19H
00：OFF(internal)
Time constant 2 fpr H PLL(Phase difference: middle)
Killer function
Mode selection for external sync
Time constant 3 fpr H PLL(Phase difference: small)
01：CsyncH
1：killer off
Time constant 1 fpr H PLL(Phase difference: big)
0：normal
01：ｘ0.16
CONFIX
00：OFF
000：32.2uS ∼ 100：36.9uS ∼ 111：40.5uS
Adjustment of digital clamp phase for Cb/Cr
Reduse dot ( Horizontal)
Adjustment start phase for noise detection
D7
EXTERNAL SYNC
1000：-1.185μｓ ∼ 0000：cemter ∼ 0111：+1.04μｓ
Adjustment start phase of horizontal signal processing
Threshold level at the phase diffrence large to middle
Adjustment start phase of vertical signal processing
1000：-1.185μｓ ∼ 0000：±０ ∼ 0111：+1.04μｓ
1000：-2.37μｓ ∼ 0000：±０ ∼ 0111：+2.27μｓ
Adjustment of input clamp phase for analog Cb/Cr
1000：-1.185uS ∼ 0000：0uS ∼ 1111：+1.04uS
000：1.19μｓ ∼ 111：3.26μｓ
DOT DIST
Adjustment horizontal phase for digital output
000：large ∼ 111：small
000：large ∼ 111：small
000：large ∼ 111：small
100000：-4.74μｓ ∼ 000000：±０μｓ ∼ 011111：+4.46μｓ（1/6.75MHzｽﾃｯﾌﾟ）
Adjustment start phase of horizontal BLK
Adjustment start line for noise detection
C ClampPulse_F
EN_NOISEH_S
0000：line 10 ∼ 1111： line 25
10：CsyncL
11：VsyncH
Adjustment the sensitivity of the killer detection
10：ｘ0.17
11：ｘ0.18
HDAMP1
HDAMP2
HDAMP3
000：0H ∼ １11：+15H
0000:OFF ∼ 1111:High
D6
50Hz：line ４ is as ０Ｈ
60Hz：line ７ is as 0H
EN_NOISEV_S
CICLMPP_S
EN_PIXH_S
EN_PIXV_S
HGCON12
HBLK_S
HDPH
COLOR KILLER LEVEL
000：Max ∼ 111：Ｍｉｎ
Adjustment Horizontal phase reference
Sync sepa. Level
SEPA LVL
COMB+
0：OFF
1：ON
0:30%
1:40%
D5
SHCTRL
Sync tip clamp mode for CVBS
1LINE DOT
01：OFF
00：ON
0：OFF
000：9.4uS ∼ 100：14.1uS ∼ 111：17.7uS
1：ON
Adjustment of digital clamp width for Cb/Cr
D4
Adjustment the width for noise detection
SYNC TIP CLAMP１
000：0.9μｓ ∼ 111：2.96μｓ
Comb selection
C ClampPulse_W
for 443NTSC
EN_NOISEH_W
10：AUTO１
11：AUTO２
0:1H Comb
1:2H Comb
EN_PIXV_A
COM443N
Loop gain 1 for H PLL(Phase difference: middle)
0：Manual
Loop gain 1 for H PLL(Phase difference: small)
1：Auto
Loop gain 1 for H PLL(Phase difference: big)
D3
1000：-1.185μｓ ∼ 0000：center∼ 0111：+1.04μｓ
1000：-1.185μｓ ∼ 0000：±０ ∼ 0111：+1.04μｓ
1000：-2.37μｓ ∼ 0000：±０ ∼ 0111：+2.27μｓ
Threshold level at the phase diffrence middle to big
Adjustment of input clamp width for analog Cb/Cr
Adjustment width of horizontal signal processing
00000：small ∼ 11111：large
00000：small ∼ 11111：large
00000：small ∼ 11111：large
Adjustment Vertical phase for digital output
0000：Ｍｉｎ ∼ 1111：Ｍａｘ 〔Initial：1000〕
HPLL Gain at lock
Adjustment width of horizontal BLK
Adjustment ＡＣＣ reference level
V sepa mode
0：1/2
1：no change
001：１∼21H
010：1∼22H
HD GAIN1
VSEPLVL
HDGAIN2
HDGAIN3
000：OFF
0：5/16
FLOCK
0000：0H ∼ 1111：+15H
1：1/2
0000:OFF ∼ 1111:High
000：ＯＦＦ ∼ １１１：×0.875（Intial：011）
D2
ＳＥＣＡＭ用 Ｙ trap performance
ACC LEVEL
CICLMPP_W
EN_PIXH_W
HGCON21
HBLK_W
VDPH
Time constant of Cb/Cr digital clamp
picture mute
011：1∼23H
100：1∼24H
101：1∼25H
V sepa limit
COMB KILL
Noise detection line numbers
01：small
1： 1/16
00：OFF
0： 1/8
CGAIN
0：OFF
00：1H
01：2H
00：3V
10：5V
VLMT
MUTE
1：ON
D1
DIGITAL C CLAMP
fsc lock period
EN_NOISEV_W
TC90101FG
VSRACH
Cb/Cr out mute
(60:22H,50:23H)
17
AFC V mask
110：1∼26H
10：mediam
111：Auto
11：large
C MUTE
0：OFF
0：OFF
HHKIL
10：3H
11：4H
01：4V
11：6V
1：ON
1：ON
D0