74ACT125MTC Fairchild Semiconductor, 74ACT125MTC Datasheet - Page 8

• Manufacturer Part Number: 74ACT125MTC
• Description: IC BUFF TRI-ST QD N-INV 14TSSOP
• Manufacturer: Fairchild Semiconductor
• Series: 74ACTr

Specifications of 74ACT125MTC

• Logic Type: Buffer/Line Driver, Non-Inverting
• Number Of Elements: 4
• Number Of Bits Per Element: 1
• Current - Output High, Low: 75mA, 75mA
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 14-TSSOP
• Logic Family: ACT
• Logical Function: Buffer/Line Driver
• Number Of Elements: 4
• Number Of Channels: 4
• Number Of Inputs: 4
• Number Of Outputs: 4
• Operating Supply Voltage (typ): 5V
• Package Type: TSSOP
• Output Type: 3-State
• Polarity: Non-Inverting
• Propagation Delay Time: 10.5ns
• High Level Output Current: -24mA
• Low Level Output Current: 24mA
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Quiescent Current: 4uA
• Technology: CMOS
• Pin Count: 14
• Mounting: Surface Mount
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

©1988 Fairchild Semiconductor Corporation
74AC125, 74ACT125 Rev. 1.4.1
Physical Dimensions
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/
C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH,
A. CONFORMS TO JEDEC REGISTRATION MO-153,
B. DIMENSIONS ARE IN MILLIMETERS
E. LANDPATTERN STANDARD: SOP65P640X110-14M
D. DIMENSIONING AND TOLERANCES PER ANSI
F. DRAWING FILE NAME: MTC14REV6
AND TIE BAR EXTRUSIONS
VARIATION AB, REF NOTE 6
Y14.5M, 1982
Figure 3. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
0.43 TYP
(Continued)
8
0.65
R0.09 min
0.45
1.65
1.00
R0.09min
12.00°
TOP & BOTTOM
6.10
www.fairchildsemi.com