MAX9450 Maxim, MAX9450 Datasheet - Page 13

• Manufacturer Part Number: MAX9450
• Description: The MAX9450/MAX9451/MAX9452 clock generators provide high-precision clocks for timing in SONET/SDH systems or Gigabit Ethernet systems
• Manufacturer: Maxim

Table 3. I
Table 4. I
*When the SPI port is activated, the first address bit on the left
is omitted and the remaining 7 bits are used. The LSB is the
first bit on the right.
Table 5. Dividing Rate Setting for P Divider
REGISTER NAME REGISTER ADDRESS
Open
Open
Open
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
High
High
High
AD0
Low
Low
Low
0000-0000
0000-0001
1111-1110
1111-1111
2
2
C Address Setting by AD0 and AD1
CR0
C and SPI Register Address*
—
______________________________________________________________________________________
00000000
00000001
00000010
00000011
00000100
00000101
00000110
00000111
00001000
Open
Open
Open
High
High
High
AD1
Low
Low
Low
DIVIDING RATE FOR P
High-Precision Clock Generators
Convert to SPI
P divider
M divider byte 1
M divider byte 2
N1 divider
N2 divider
Control
Control
Status
Reserved
255
256
—
1
2
ADDRESS
FUNCTION
1101000
1101001
1101010
1101011
1101100
1101101
1101110
1101111
Table 6. Dividing Rate Setting for M Divider
*CR2[0], the last LSB, is reserved.
Table 7. Dividing Rate Setting for N0 and
N1 Divider
*The last 5 LSBs of CR3[4:0] and CR4[4:0] are reserved.
000XXXXX
001XXXXX
010XXXXX
011XXXXX
100XXXXX
101XXXXX
110XXXXX
111XXXXX
with Integrated VCXO
0000-0000
0000-0000
1111-1111
1111-1111
1111-1111
CR3*
CR1
—
VALUE OF N0
DIVIDING
16
1
2
3
4
5
6
8
CR2[7:1]*
0000-000
0000-001
0011-110
0011-111
1111-111
—
000XXXXX
001XXXXX
010XXXXX
011XXXXX
100XXXXX
101XXXXX
110XXXXX
111XXXXX
CR4*
DIVIDING VALUE OF M
32,768
8191
8192
VALUE OF N1
—
1
2
DIVIDING
16
1
2
3
4
5
6
8
13