MAX9248 Maxim, MAX9248 Datasheet - Page 9
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MAX9248
Manufacturer Part Number
MAX9248
Description
The MAX9248/MAX9250 digital video serial-to-parallel converters deserialize a total of 27 bits during data and control phases
Manufacturer
Maxim
Datasheet
1.MAX9248.pdf
(20 pages)
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Figure 1. LVDS Input Bias
Figure 3. Output Rise and Fall Times
Figure 5. Synchronous Output Timing
Figure 6. Deserializer Delay
RGB_OUT[17:0]
CNTL_OUT[8:0]
IN+, IN-
IN+
IN-
PCLK_OUT
CNTL_OUT
DE_OUT
RGB_OUT
PCLK_OUT
PCLK_OUT SHOWN FOR R/F = HIGH (RISING LATCH EDGE)
RGB_OUT[17:0]
CNTL_OUT[8:0]
LOCK
PCLK_OUT
R
R
IB
IB
DE_OUT
LOCK
SERIAL-WORD N
_______________________________________________________________________________________
20 SERIAL BITS
t
R
1.2V
0.9 x V
0.1 x V
CCO
CCO
DC-Balanced LVDS Deserializers
t
F
2.0V
0.8V
LVDS
RECEIVER
SERIAL-WORD N + 1
t
DVB
t
DELAY
PARALLEL-WORD N - 1
27-Bit, 2.5MHz to 42MHz
0.8V
Figure 2. Worst-Case Output Pattern
Figure 4. High and Low Times
RISING LATCH EDGE SHOWN (R/F = HIGH).
PCLK_OUT
PCLK_OUT
CNTL_OUT
CNTL_OUT
PCLK_OUT SHOWN FOR R/F = HIGH
RGB_OUT
RGB_OUT
EVEN
ODD
2.0V
t
DVA
t
LOW
2.0V
0.8V
PARALLEL-WORD N
t
HIGH
0.8V
2.0V
9