MAX9224 Maxim, MAX9224 Datasheet - Page 9

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MAX9224

Manufacturer Part Number
MAX9224
Description
The MAX9223/MAX9224 serializer/deserializer chipsets reduce wiring by serializing 22 bits onto a single differential pair
Manufacturer
Maxim
Datasheet
The MAX9223 serializer operates at a 5MHz to 10MHz
parallel clock frequency, serializing 22 bits of parallel
input data DIN[21:0] in each cycle of the parallel clock.
DIN[21:0] are latched on the rising edge of PCLKIN.
The data and internally generated serial clock are com-
bined and transmitted through SDO+/SDO- using multi-
level LCDS. The MAX9224 deserializer receives the
LCDS signal on SDI+/SDI-. The deserialized data and
recovered parallel clock are available at DOUT[21:0]
Serial word format:
The MAX9223/MAX9224 use a proprietary multilevel
LCDS interface. Figure 5 provides a representation of
the data and clock in the multilevel LCDS interface.
This interface offers advantages over other chipsets,
such as requiring only one differential pair as the trans-
mission medium, the inherently aligned data and clock,
and much smaller current levels than the 4mA typically
found in traditional LVDS interfaces.
The handshaking function of the MAX9223/MAX9224
provides bidirectional communication between the two
devices in case a word boundary error is detected. Prior
DIN[21:0]
G
PCLKIN
0
MAX9223 Functional Diagram
1
MAX9223
MAX9223/MAX9224 Handshaking
2
_______________________________________________________________________________________
LATCH
INPUT
3
Detailed Description
4
CONTROL
TIMING
AND
DLL
5
22-Bit, Low-Power, 5MHz to 10MHz
Serializer and Deserializer Chipset
6
7
8
9
LCDS
PWRDN
SDO+
SDO-
10
11
and PCLKOUT. Output data is valid on the rising edge
of PCLKOUT.
The first bit (G) is internally grounded and transmitted
first. Bit 0 (DIN[0]) is the first valid data bit. Boundary
bits OH are used by the MAX9224 deserializer to identi-
fy the word boundary and are the inverse polarity of
data bit 21 (DIN[21]). Therefore, at least one level tran-
sition is guaranteed in one word. The clock is recov-
ered from the serial input.
to data transmission, the MAX9223 serializer adds
boundary bits (OH) to the end of the latched word.
These boundary bits are the inverse of the last bit of the
latched word. During data transmission, the MAX9224
deserializer continuously monitors the state of the
boundary bits of each word. If a word boundary error is
detected, the serial link is pulled up to V
MAX9224 powers down. The MAX9223 detects the
pullup of the serial link and powers down for 1.0µs. After
1.0µs, the MAX9223 powers up, causing the power-up
of the MAX9224. Then the word boundary is reestab-
lished, and data transfer resumes. The handshaking
function is disabled when PWRDN is pulled low.
SDI+
SDI-
12
13
MAX9224 Functional Diagram
MAX9224
14
15
16
TIMING AND CONTROL
17
18
19
20
21
DD
OH OH
PCLKOUT
and the
DOUT[21:0]
9

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