MAX9122 Maxim, MAX9122 Datasheet
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MAX9122
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MAX9122 Summary of contents
Page 1
... LVDS standard. Flow-through pinout simplifies PC board layout and reduces crosstalk by separating the LVDS inputs and LVCMOS outputs. The MAX9121/ MAX9122 operate from a single +3.3V supply, and are specified for operation from -40°C to +85°C. These devices are available in 16-pin TSSOP and SO packages. ...
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... 3. Figure 1 IN2 3. Figure 1 DIFF CC Open, undriven short, or undriven 100Ω parallel I = -4.0mA OH termination (MAX9121 +100mV ID Open or undriven short I = -4.0mA OH (MAX9122 +100mV +4.0mA -100mV Enabled 0.1V (Note OUT I Disabled OUT / ...
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... Differential Part-to-Part Skew (Note 8) Rise-Time Fall-Time Disable Time High to Z Disable Time Low to Z Enable Time Z to High Enable Time Z to Low Maximum Operating Frequency (Note 9) _______________________________________________________________________________________ Quad LVDS Line Receivers with | = 0.1V to 1.0V, common-mode voltage +3.3V +25°C, unless otherwise noted.) (Note 1) ...
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... CC Note the magnitude difference of any differential propagation delays between parts operating over rated conditions. SKD4 Note 9: f generator output conditions: rise-time = fall-time = 1ns (0% to 100%), 50% duty cycle, V MAX MAX9121/MAX9122 output criteria: 60% to 40% duty cycle +3.3V +1.2V 0.2V SUPPLY CURRENT vs ...
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Integrated Termination and Flow-Through Pinout (V = +3.3V +1.2V 0.2V OUTPUT LOW VOLTAGE vs. SUPPLY VOLTAGE 100 3.0 3.3 SUPPLY VOLTAGE (V) DIFFERENTIAL ...
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... The internal termination saves board space, eases lay- out, and reduces stub length compared to an external termination resistor. In other words, the transmission line is terminated on the IC. The fail-safe feature of the MAX9121/MAX9122 sets an output high when: • Inputs are open. • Inputs are undriven and shorted. ...
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... R IN1 IN_- close to the device as possible, with the smaller valued capacitor closest to V Input trace characteristics affect the performance of the MAX9121/MAX9122. Use controlled-impedance PC - 0.3V CC board traces to match the cable characteristic imped- ance. The termination resistor is also matched to this characteristic impedance. Eliminate reflections and ensure that noise couples as common mode by running the differential traces close together ...
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... EMI due to magnetic field canceling effects. Balanced cables pick up noise as common mode, which is rejected by the LVDS receiver. The MAX9122 has an integrated termination resistor connected across the inputs of each receiver. The 8 _______________________________________________________________________________________ IN_+ ...
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... OUTPUT WHEN V = +100mV ID Figure 5. High-Impedance Delay Waveforms Because the MAX9121/MAX9122 feature a flow-through pinout, no special layout precautions are required. Keep the LVDS and any other digital signals separated from each other to reduce crosstalk. For LVDS applications, a four-layer PC board that pro- vides separate power, ground, LVDS signals, and input signals is recommended ...
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... IN4 MAX9121 GND IN1 IN1 OUT1 IN2 OUT2 MAX9121 IN2 MAX9122 IN3 GND IN3 OUT3 IN4 OUT4 IN4 TSSOP/SO Functional Diagram V CC OUT1 OUT2 OUT3 OUT4 MAX9122 GND Pin Configuration ...
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Integrated Termination and Flow-Through Pinout ______________________________________________________________________________________ Quad LVDS Line Receivers with Package Information 11 ...
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... Quad LVDS Line Receivers with Integrated Termination and Flow-Through Pinout Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. ...