MAX4543 Maxim, MAX4543 Datasheet - Page 7

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MAX4543

Manufacturer Part Number
MAX4543
Description
The MAX4541–MAX4544 are precision, dual analog switches designed to operate from a single +2
Manufacturer
Maxim
Datasheet

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Do not exceed the absolute maximum ratings because
stresses beyond the listed ratings may cause perma-
nent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals or logic inputs, especially if the analog
or logic signals are not current limited. If this sequenc-
ing is not possible, and if the analog or logic inputs are
not current limited to < 10mA, add a small-signal diode
(D1) as shown in Figure 1. If the analog signal can dip
below GND, add D2. Adding protection diodes
reduces the analog signal range to a diode drop (about
0.7V) below V+ (for D1), and to a diode drop above
ground (for D2). Leakage is unaffected by adding the
diodes. On-resistance increases by a small amount at
low supply voltages. Maximum supply voltage (V+)
must not exceed 13V.
Figure 2. Switching Time
MAX4541
MAX4542
MAX4543
MAX4544
LOGIC
INPUT
SWITCH
INPUT
_______________________________________________________________________________________
C
V
L
OUT
and Overvoltage Protection
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
or NC
IN
= V
Power-Supply Sequencing
GND
0V
COM
(
R
L
R
+ R
L
ON
)
V+
V+
Dual SPST/SPDT Analog Switches
COM
R
1kΩ
L
SWITCH
OUTPUT
Low-Voltage, Single-Supply
C
35pF
L
V
OUT
Adding protection diodes causes the logic thresholds
to be shifted relative to the power-supply rails. This can
be significant when low supply voltages (+5V or less)
are used. With a +5V supply, TTL compatibility is not
guaranteed when protection diodes are added. Driving
IN1 and IN2 all the way to the supply rails (i.e., to a
diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against
some overvoltage situations. With Figure 1’s circuit, if
the supply voltage is below the absolute maximum rat-
ing, and if a fault voltage up to the absolute maximum
rating is applied to an analog signal pin, no damage
will result.
OUTPUT
SWITCH
LOGIC
INPUT
Test Circuits/Timing Diagrams
+3V
0
0
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V
t
50%
OUT
ON
0.9 x V
0UT
t
OFF
t r < 20ns
t f < 20ns
0.9 x V
OUT
7

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